PCI-SIG DevCon 2009

PCI-SIG Developers Conference 2009 Agenda

The sessions below are categorized by track subject according to the following key:

(1) PCI Express
(2) PCI-SIG Architecture
(3) Members Implementation
(4) Members Implementation

Day One - Wednesday, July 15, 2009

Time Title
8:00 am - 9:00 am
9:00 am- 9:30 am
Registration in Foyer
Introductory Keynote / Annual Member Meeting
9:30 am - 10:30 am (1) PCIe 2.1 / PCIe 3.0 Protocol Changes
(2) PCI-SIG Architecture
(3) Alignment and Skew Correction Techniques in PCIe 3.0
(4) Jitter Decomposition & Pre-emphasis De-embedding for 8 GT/s PCIe
10:30 am - 11:30 am (1) PCIe 3.0 Cards
(2) PCI Express Basics
(3) High Performance Architectures for Virtualized I/O
(4) Design & Implementation of High Performance FPGA DMA
11:30 am - 1:00 pm Lunch and Exhibit
1:00 pm - 2:00 pm (1) PCIe 3.0 Electricals - Part I
(2) PCIe 2.x vs. PCIe 1.x
(3) Debugging PCIe Link and Transaction Layer Issues
(4) Power Management Device Architecture
2:00 pm - 3:00 pm

(1) PCIe 3.0 Electricals - Part II
(2) PCIe 3.0 Overview
(3) Challenges in Functional Verification of PCIe 3.0 Devices
(4) Benefiting from PCIe and SuperSpeed USB Similarities

3:00 pm - 3:30 pm PM Break and Exhibit
3:30 pm - 4:30 pm (1) PCIe PHY Logical
(2) PCI Express Electrical Basics
(3) Configurable FPGA PCI Express 2.0 x8 Architecture
(4) Hard-Learnt Lessons from the Verification of a PCIe Switch
4:30 pm - 5:30 pm (1) PCIe 3.0 Compliance
(2) IOV Overview
(3) Experience Gained Modeling a PCIe System
(4) Anatomy and Applications of PCI Express Switching Technology
5:30 pm - 7:00 pm Evening Mixer


Day Two - Thursday, July 16, 2009

Time Title
9:00 am - 10:00 am (1) PCIe 2.1 / PCIe 3.0 Protocol Changes
(2) PCI-SIG Architecture
(3) Designing High-Speed Transceivers
10:00 am - 10:30 am AM Break and Exhibit
10:30 am - 11:30 am (1) PCIe 3.0 Electricals - Part I
(2) PCI Express Basics
(3) Using PCIe Vendor Defined Messages for Component Management
11:30 am - 12:30 pm (1) PCIe 3.0 Electricals - Part II
(2) PCIe 2.x vs. PCIe 1.x
(3) Multi-Host PCI Express Switches
12:30 pm - 1:30 pm Lunch and Exhibit
1:30 pm - 2:30 pm (1) PCIe 3.0 Cards
(2) PCIe 3.0 Overview
(3) Methods for Maxamizing Margins of PCIe 3.0 Devices
2:30 pm - 3:30 pm

(1) PCIe PHY Logical
(2) PCI Express Electrical Basics
(3) Challenges in PCIe 3.0 Designs: Failure Teaches Success

3:30 pm - 4:00 pm PM Break in Foyer
4:00 pm - 5:00 pm
(1) PCIe 3.0 Compliance
(2) IOV Overview
(3)  Phase Valid Compensation in PCIe 3.0 Implementations 
5:00 pm - 6:00 pm (3) Optimizing PCIe Performance in PCs & Embedded Systems
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