PCI-SIG - DevCon 2011 Agenda

PCI-SIG DevCon 2011

PCI-SIG Developers Conference 2011 Agenda

The sessions below are categorized by track subject according to the following key:

(1) PCI Express
(2) PCI-SIG Architecture
(3) Members Implementation
(4) Members Implementation

Day One - Wednesday, June 22, 2011

Time	Title
8:00 am - 9:00 am 9:00 am - 9:30 am	Registration in Foyer Introductory Keynote / Annual Member Meeting
9:30 am - 10:30 am	(1) PCIe 3.0 / Post-3.0 Protocol Changes (2) PCI-SIG Architecture Overview (3) DFE Adaptation Method for PCIe 8GT/s Testing (4) FPGA-integrated PCIe 3.0 Digital IP Architecture
10:30 am - 11:30 am	(1) PCIe PHY Logical (2) PCI Express Electrical Basics (3) Device Emulation Techniques for PCIe Systems (4) PCIe 3.0 IBIS-AMI Models for Channel Analysis
11:30 am - 1:00 pm	Lunch and Exhibit
1:00 pm - 2:00 pm	(1) PCIe 3.0 Electricals - Part I (2) PCI Express Basics (3) Debugging PCIe 3.0 Link Problems (4) Run-time PCI Device Reconfiguration
2:00 pm - 3:00 pm	(1) PCIe 3.0 Electricals - Part II (2) IOV-Enabling Protocol Changes (3) PCIe 3.0 Controller Case Study (4) Advanced Verification Eases PCIe 3.0 Design
3:00 pm - 3:30 pm	PM Break and Exhibit
3:30 pm - 4:30 pm	(1) PCIe 3.0 Cards (2) Cable Spec 2.0 Update (3) Varied Applications & PCIe's Three Data Rates (4) Extending PCIe 8GT/s Links Across Lossy Media
4:30 pm - 5:30 pm	(1) PCIe 3.0 Compliance - Focus on Electrical (2) ExpressModule Updates (3) Scaling Data Center Interconnects with PCI Express (4) The Case for PCIe 3.0 Repeaters
5:30 pm - 7:00 pm	Evening Mixer

Day Two - Thursday, June 23, 2011

Time	Title
9:00 am - 10:00 am	(1) PCIe 3.0 / Post-3.0 Protocol Changes (2) PCI-SIG Architecture Overview (3) Advanced Equalization Techniques for PCIe 8GT/s
10:00 am - 10:30 am	AM Break and Exhibit
10:30 am - 11:30 am	(1) PCIe 3.0 Electricals - Part I (2) PCI Express Basics (3) PCIe 3.0 Controller Design Architectural Challenges
11:30 am - 12:30 pm	(1) PCIe 3.0 Electricals - Part II (2) IOV-Enabling Protocol Changes (3) Designing an AMBA-based SoC with a PCIe Interface
12:30 pm - 1:30 pm	Lunch and Exhibit
1:30 pm - 2:30 pm	(1) PCIe PHY Logical (2) Cable Spec 2.0 Update (3) PCIe 3.0 - Coping with 8GT/s Electrical Challenges
2:30 pm - 3:30 pm	(1) PCIe 3.0 Cards (2) PCI Express Electrical Basics (3) Advanced Techniques for PCIe 3.0 Receiver Testing
3:30 pm - 4:00 pm	PM Break in Foyer
4:00 pm - 5:00 pm	(1) PCIe 3.0 Compliance - Overview (2) ExpressModule Updates (3) Implementation of Protocol Multiplexing in PCI Express

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