PCI-SIG DevCon 2012

PCI-SIG Developers Conference 2012 Agenda

The sessions below are categorized by track subject according to the following key:

(1) PCI Express
(2) PCI-SIG Architecture
(3) Members Implementation

Day One - Wednesday, July 11, 2012

Time Title
8:00 am - 9:00 am
9:00 am - 9:30 am
Registration in Foyer
Introductory Keynote / Annual Member Meeting
9:30 am - 10:30 am (1) PCIe 3.0 Compliance - Focus on Electrical
(2) PCI-SIG Architecture Overview
(3) Simulation Methodology for Optimized Sign-off of PCIe 3.0
10:30 am - 11:30 am (1) PCIe 3.0 Cards
(2) PCI Express Electrical Basics
(3) Hands-on Techniques for Successfully Performing PCIe 3.0 Receiver Testing
11:30 am - 1:00 pm Lunch and Exhibit
1:00 pm - 2:00 pm (1) PCIe 4.0 Electrical Previews - Part I
(2) PCI Express Basics
(3) Implementing Systems using PCI Express as a Fabric
2:00 pm - 3:00 pm (1) PCIe 4.0 Electrical Previews - Part II
(2) PCI Express Cabling Updates
(3) Debugging PCIe 3.0 Issues with a Protocol Analyzer
3:00 pm - 3:30 pm PM Break and Exhibit
3:30 pm - 4:30 pm (1) PCIe 3.0 PHY Logical
(2) PCIe Mini CEM Updates
(3) PCIe 3.0: 8.0 GT/s Digital Retimer
4:30 pm - 5:30 pm (1) PCIe Post-3.0 Protocol Changes
(2) PCI Express Futures
(3) Storage Over PCI Express Traffic Analysis and Generation Techniques
5:30 pm - 8:00 pm PCI-SIG 20th Anniversary Party & Trivia-night Themed Dinner


 

Day Two - Thursday, July 12, 2012

Time Title
9:00 am - 10:00 am (1) PCIe 3.0 Compliance - Overview
(2) PCI-SIG Architecture Overview
(3) Advanced Techniques for PCIe 3.0 Dynamic Equalization Testing
10:00 am - 10:30 am AM Break and Exhibit
10:30 am - 11:30 am (1) PCIe 4.0 Electrical Previews - Part I
(2) PCI Express Basics
(3) Debugging PCIe 3.0 Link Training, Equalization, and ASPM Problems
11:30 am - 12:30 pm (1) PCIe 4.0 Electrical Previews - Part II
(2) PCIe Mini CEM Updates
(3) Designing to the New PCIe 3.0 Equalization Requirements
12:30 pm - 1:30 pm Lunch and Exhibit
1:30 pm - 2:30 pm (1) PCIe 3.0 Cards
(2) PCI Express Cabling Updates
(3) FPGA Transceiver for PCI Express 3.0
2:30 pm - 3:30 pm (1) PCIe Post-3.0 Protocol Changes
(2) PCI Express Electrical Basics
(3) Implementing PCIe on Optical Links
3:30 pm - 4:00 pm PM Break in Foyer
4:00 pm - 5:00 pm
 
(1) PCIe 3.0 PHY Logical
(2) PCI Express Futures
(3) Speed Up PCIe System Verification Using Hardware Acceleration

 

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