PCI-SIG - agenda

PCI-SIG Developers Conference 2013 Agenda

The sessions below are categorized by track subject according to the following key:

(1) PCI Express
(2) PCI-SIG Architecture
(3) Members Implementation
(4) Members Implementation

The event Program Guide has additional details including session abstracts and speaker bios for review.

Day One - Tuesday, June 25, 2013

Time	Title
8:00 am - 9:00 am 9:00 am - 9:30 am	Registration in Foyer Introductory Keynote / Annual Member Meeting
9:30 am - 10:30 am	(1) PCIe 3.0 Compliance (2) PCI-SIG Architecture Overview (3) SR-IOV Devices in Line Card Control Plane Processing (4) Implementing a PCI Express-Based Fabric for MicroServer Platforms
10:30 am - 11:30 am	(1) PCIe 3.0 Cards (2) PCIe Electrical Basics (3) Design Challenges of RX Equalizer and DFE Design at 16GT/s (4) Testing and Verification of NVMe PCIe Devices
11:30 am - 1:00 pm	Lunch and Exhibit
1:00 pm - 2:00 pm	(1) PCIe 4.0 Electrical Previews - Part I (2) PCI Express Basics (3) Debugging PCIe 3.0 Link Training, Equalization and ASPM Problems (4) Running High Performance Applications over a PCI Express Network
2:00 pm - 3:00 pm	(1) PCIe 4.0 Electrical Previews - Part II (2) M-PCIe Overview (3) Advanced Debugging Techniques for PCIe 3.0 Dynamic Equalization Testing (4) MCTP Over PCIe Implementation
3:00 pm - 3:30 pm	PM Break and Exhibit
3:30 pm - 4:30 pm	(1) PCIe 3.0 PHY Logical (2) PCIe M.2 Updates (3) M-PCIe IP Implementation Case Study (4) PCI Express Hot Plug – An Implementation Level View
4:30 pm - 5:30 pm	(1) PCIe Post-3.0 Protocol Changes (2) OCuLink Specification Update (3) Migrating PCIe Designs to M-PCIe
5:30 pm - 7:00 pm	Evening Mixer

Day Two - Wednesday, June 26, 2013

Time	Title
9:00 am - 10:00 am	(1) PCIe 3.0 Compliance (2) PCI-SIG Architecture Overview (3) Identifying Performance Bottlenecks for High Performance PCIe Applications
10:00 am - 10:30 am	AM Break and Exhibit
10:30 am - 11:30 am	(1) PCIe 4.0 Electrical Previews - Part I (2) PCI Express Basics (3) Explore Efficient Test Approaches for PCIe at 8GT/s and Beyond
11:30 am - 12:30 pm	(1) PCIe 4.0 Electrical Previews - Part II (2) PCIe M.2 Updates (3) Advanced Techniques for Automating PCIe 3.0 TX Signal Analysis
12:30 pm - 1:30 pm	Lunch and Exhibit
1:30 pm - 2:30 pm	(1) PCIe 3.0 Cards (2) OCuLink Specification Update (3) PCI Express' New Low Power Modes Driving Tablets, Cloud
2:30 pm - 3:30 pm	(1) PCIe Post-3.0 Protocol Changes (2) M-PCIe Overview (3) Implementing In-System Eye Measurement
3:30 pm - 4:00 pm	PM Break in Foyer
4:00 pm - 5:00 pm	(1) PCIe 3.0 PHY Logical (2) PCIe Electrical Basics