Mail Index
[Prev Page][Next Page]
- Please subsribe
- From: "Leo, Stephen P" <stephen.p.leo@intel.com>
- PCI specs. contradicts PCI compliance checklist for IO Bursts
- From: Mukesh Ayala <mukesh@cgcoreel.com>
- PCI configuration read
- From: SIJU GEORGE <sijug@nestec.net>
- More Results --> Bus Master Write Problems
- From: Duncan Terry S Civ AFRL/DES <Terry.Duncan@plk.af.mil>
- Re: SRAM Based FPGA Devices
- From: Michael Richardson <mcr@solidum.com>
- Results --> RE: Bus Master Write Problems
- From: Duncan Terry S Civ AFRL/DES <Terry.Duncan@plk.af.mil>
- Re: SRAM Based FPGA Devices
- From: Ed Romascan <ed@magma.com>
- Re: SRAM Based FPGA Devices
- From: Michael Richardson <mcr@solidum.com>
- SRAM Based FPGA Devices
- From: "Dominick Cafarelli" <dominick_cafarelli@flashcom.net>
- SRAM Based PCI FPGA
- From: "Dominick Cafarelli" <dominick_cafarelli@flashcom.net>
- Re: PCI 64-bit addressing - problem
- From: Neal Palmer <neal@dinigroup.com>
- RE: PCI 64-bit addressing - problem
- From: Lame Brooks-G14738 <brooks.lame@motorola.com>
- Re: PCI course
- From: Lloyd Bircher <nicad2@yahoo.com>
- Re: PCI 64-bit addressing - problem
- From: Lloyd Bircher <nicad2@yahoo.com>
- Re: PCI 64-bit addressing - problem
- From: wen-king@myri.com (Wen-King Su)
- PCI course
- From: Bruce Allan <bwa@sequent.com>
- PCI 64-bit addressing - problem
- From: Raan Kahn <raan@ngcable.com>
- Re: PCI 2.1 spec
- From: Rick Collins - Arius <PCImail@arius.com>
- RE: PCI 2.1 spec
- From: "Ingraham, Andrew" <Andrew.Ingraham@compaq.com>
- Re: PCI 2.1 spec
- From: "Cary Snyder" <cdsnyder@earthlink.net>
- PCI 2.1 spec
- From: Ben Yurick <byurick@keithley.com>
- RE: Order of PCI cards if multiple cards are installed.
- From: Jeff Dahlin <JDahlin@appiangraphics.com>
- How to Model Test Load in synopsys
- From: Sanjay Goyal <SanjayG@ami.com>
- Re: Message Signalled Interrupt Support
- From: Carl Jackson <jackson@rsn.hp.com>
- Order of PCI cards if multiple cards are installed.
- From: "Jeremy Sabo" <jeremysabo@hotmail.com>
- Initializing BARs at Power-Up
- From: Joseph Kuspa <joseph_kuspa@memecdesign.com>
- PCI-PCI bridge boards
- From: Salyl Bhagwat <salyl@psti.com>
- Re: CPCI: RE: Message Signalled Interrupt Support
- From: Markus Leberecht <Markus.Leberecht@force.de>
- Re: CPCI: RE: Message Signalled Interrupt Support
- From: Guenter Graf <Guenter.Graf@force.de>
- RE: CPCI: RE: Message Signalled Interrupt Support
- From: "Somes, Richard" <Richard.Somes@compaq.com>
- RE: CPCI: RE: Message Signalled Interrupt Support
- From: Don McCallum <DMcCallum@truetime.com>
- RE: Message Signalled Interrupt Support
- From: Lame Brooks-G14738 <brooks.lame@motorola.com>
- PCI Master Conflict
- From: "ANCUD ANCUD" <ancud@ru.ru>
- Message Signalled Interrupt Support
- From: "Brad Hosler" <brad@pc2.com>
- RE: long burst writes under NT 4.0?
- From: Derry Shribman <derry@krftech.com>
- Bus Master Write Problems
- From: Duncan Terry S Civ AFRL/DES <Terry.Duncan@plk.af.mil>
- RE: long burst writes under NT 4.0?
- From: "O'Shea, David J" <david.j.oshea@intel.com>
- long burst writes under NT 4.0?
- From: Jim Foote <foote@parc.xerox.com>
- Any announced PCI-X devices?
- From: Peleska Pavel <Pavel.Peleska@icn.siemens.de>
- Re: PRSNT Signals
- From: "Cary Snyder" <cdsnyder@earthlink.net>
- Re: PRSNT Signals
- From: Michael Richardson <mcr@sandelman.ottawa.on.ca>
- Re: cacheline
- From: "Mohsin Rahmatullah" <mohsin@enabtech.com>
- RE: cacheline
- From: "Solomon, Gary" <gary.solomon@intel.com>
- Re: cacheline
- From: Richard Walter <rwalter@corp.auspex.com>
- PRSNT Signals
- From: "peter.ross" <peter.ross@imshq.ftech.co.uk>
- cacheline
- From: "kskumar" <kskumar@chiplogic.com>
- RE: PCI 2.2 spec - Subsystem ID and Subsystem Vendor ID Regs
- From: "O'Shea, David J" <david.j.oshea@intel.com>
- Re: PCI patent list
- From: Alan Deikman <Alan.Deikman@znyx.com>
- Re: PCI patent list
- From: Alan Deikman <Alan.Deikman@znyx.com>
- RE: PCI-X IP Core
- From: "Ingraham, Andrew" <Andrew.Ingraham@compaq.com>
- PCI-X IP Core
- From: Tim Gallagher <timg@seakr.com>
- Re: PCI patent list
- Re: PCI patent list
- From: "John Birkner" <birkner@quicklogic.com>
- FW: PCI Capacitance Load
- PCI patent list
- From: Sanjay Arora <sanjay@netapp.com>
- PCI 2.2 spec - Subsystem ID and Subsystem Vendor ID Regs
- From: Walter Gomes <Walter.Gomes@computerboards.com>
- PCI-X Spec Question
- From: tilmann_wendel@agilent.com
- RE: PCI bussed signals trace impedance: Motherboard vs Expansion boar d
- From: "Ingraham, Andrew" <Andrew.Ingraham@compaq.com>
- PCI bussed signals trace impedance: Motherboard vs Expansion board
- From: Walter Gomes <Walter.Gomes@computerboards.com>
- Only 14 Good Reps Needed ...
- From: tran2@indiatimes.com
- RE: Two devices on one card RE: Motherboard questions
- From: Lame Brooks-G14738 <brooks.lame@motorola.com>
- RE: Motherboard questions
- From: Lame Brooks-G14738 <brooks.lame@motorola.com>
- PCI-X / PCI Spec Question
- From: tilmann_wendel@agilent.com
- Motherboard questions
- From: Walter Gomes <Walter.Gomes@computerboards.com>
- PCI-SIG Member Benefits at DesignCon 2000
- From: Laurie Johnson <lauriej@mkinc.com>
- Re: Help needed for Linux driver
- From: Michael Richardson <mcr@solidum.com>
- PCI development
- From: Matt Bowles <matt@dsp.com.au>
- Re: Help needed for Linux driver
- From: "Scott C. Karlin" <scott@CS.Princeton.EDU>
- Re: Help needed for Linux driver
- From: Michael Richardson <mcr@solidum.com>
- PCI Bus Master on MIPS platform
- From: Sean Lee-Loy <sloy@ati.com>
- Fw: Help needed for Linux driver
- From: "Cary Snyder" <cdsnyder@earthlink.net>
- RE: More on 66Mhz & Universal keyed card test systems.
- From: jukka.alve@nokia.com
- Re: 3.3V PCI Motherboard
- From: Terje Melsom <terje@vmetro.no>
- More on 66Mhz & Universal keyed card test systems.
- From: "O'Shea, David J" <david.j.oshea@intel.com>
- RE: 3.3V PCI Motherboard
- From: wen-king@myri.com (Wen-King Su)
- RE: 3.3V PCI Motherboard
- From: "O'Shea, David J" <david.j.oshea@intel.com>
- 3.3V PCI Motherboard
- From: Judy Fuess <JudyF@motioneng.com>
- Performance problem on i810e-based motherboard
- From: Peter Monta <pmonta@terayon.com>
- Best New Trade Show Display By Opera Portables, Inc.
- From: "Opera Portables Inc." <gjkmail@earthlink.net>
- PCI SIG NEWS FLASH - January 2000
- From: Laurie Johnson <lauriej@mkinc.com>
- PCI Bus Idle during a hotplug operation ?
- From: Arvind Kini <Arvind.Kini@Eng.Sun.COM>
- A.G.P. ECRs #49 and #50
- From: "Ingraham, Andrew" <Andrew.Ingraham@compaq.com>
- Can devices generate RMW cycles in PCI 2.2 ?
- From: "Scott C. Karlin" <scott@CS.Princeton.EDU>
- RE: 3.3V signaling PCI
- From: "Ingraham, Andrew" <Andrew.Ingraham@compaq.com>
- 3.3V signaling PCI
- From: "Shashidhar S" <shashidhar.shankara@wipro.com>
- RE: - Low Profile re-defined
- From: Lame Brooks-G14738 <brooks.lame@motorola.com>
- PCI Power Management Implementation Issue
- Re: omission of CFG REG in FPGA for embeded system
- From: "Hiroaki Okumiya" <OKUMIYA@jp.ibm.com>
- IEEE HiRelPCI RE: More PCI Form Factors
- From: Lame Brooks-G14738 <brooks.lame@motorola.com>
- omission of CFG REG in FPGA for embeded system
- From: "Hiroaki Okumiya" <OKUMIYA@jp.ibm.com>
- More PCI Form Factors RE: Mini = Small ?
- From: Lame Brooks-G14738 <brooks.lame@motorola.com>
- RE: Mini = Small ?
- From: Lame Brooks-G14738 <brooks.lame@motorola.com>
- Mini = Small ?
- From: Cadez Borut RDHW <b.cadez@iskratel.si>
- RE: Violation PCI spec again
- From: Lame Brooks-G14738 <Brooks_Lame@mdcexchsrv1.mry.mcd.mot.com>
- stock offer
- From: "Robert" <robert.fj@cybergal.com>
- RE: Violation PCI spec again
- From: "O'Shea, David J" <david.j.oshea@intel.com>
- Violation PCI spec again
- From: maarten.ghijsen@philips.com
- RE: Violation of the PCI spec.
- From: Lame Brooks-G14738 <Brooks_Lame@mdcexchsrv1.mry.mcd.mot.com>
- Violation of the PCI spec.
- From: maarten.ghijsen@philips.com
- About the Master termination when the Target is waiting
- From: "makoto takebe" <makoto_takebe@komatsu.co.jp>
- RE: PCI configuration question
- From: Lame Brooks-G14738 <Brooks_Lame@mcg.mot.com>
- PCI configuration question
- From: Raan Kahn <raan@ngcable.com>
- Re: PCI Analysers
- From: "John Birkner" <birkner@quicklogic.com>
- Re: PCI Analysers
- From: "John Birkner" <birkner@quicklogic.com>
- RE: PCI Analysers
- From: Lame Brooks-G14738 <Brooks_Lame@mcg.mot.com>
- PCI Analysers
- From: "Taylor, Mike" <mike@exchange.SCOTLAND.NCR.com>
- RE: BIOS Bus Master Option
- From: Graeme Gill <graeme@colorbus.com.au>
- Target-Abort Question
- From: "Calle, Jaime" <JC121128@exchange.SanDiegoCA.NCR.COM>
- RE: BIOS Bus Master Option
- From: Lame Brooks-G14738 <Brooks_Lame@mcg.mot.com>
- RE: PCI SPECIFICATION
- From: Lame Brooks-G14738 <Brooks_Lame@mcg.mot.com>
- Re: PCI 2.2 & Max Retry Time
- From: fmnemeth@collins.rockwell.com
- PCI 2.2 & Max Retry Time
- From: Jeff Dahlin <JDahlin@appiangraphics.com>
- Re: BIOS Bus Master Option
- From: Tony Clark <clark@MGI.com>
- PCI SPECIFICATION
- From: "martin o'brien" <martinobrien8@hotmail.com>
- RE: BIOS Bus Master Option
- From: "Olaf Birkeland" <Olaf.Birkeland@fast.no>
- BIOS Bus Master Option
- From: Lloyd Bircher <nicad2@yahoo.com>
- RE: Relation between PCI rev 2.2 and HOT SWAP
- From: Mun.Loh@infineon.com
- RE: Relation between PCI rev 2.2 and HOT SWAP
- From: Lame Brooks-G14738 <Brooks_Lame@mcg.mot.com>
- Relation between PCI rev 2.2 and HOT SWAP
- From: Mun Loh <mun.loh@infineon.com>
- FW: Byte enable and target abort
- PCI mechanical specifications
- From: Geir Pedersen <geirp@newlearning.no>
- Processors with PCI interface
- From: "Richard Waltham" <dormouse@farsrobt.demon.co.uk>
- hot swap sequencer/controller
- From: "Doron Tal" <doront@iprad.co.il>
- RE: Conduction Cooled PMC
- From: Lame Brooks-G14738 <Brooks_Lame@mcg.mot.com>
- Re: Conduction Cooled PMC
- From: Ivor Bowden <ivor@peritek.com>
- Q : PCI bus and boot ROM on a NIC
- From: "Ajit" <ajit@controlnet.co.in>
- WG: i960 RP processor
- From: Mahler Willi <Willi.Mahler@icn.siemens.de>
- RE: PCI IO illegal addressing...again
- From: "Olaf Birkeland" <Olaf.Birkeland@fast.no>
- PCI IO illegal addressing...again
- From: Raan Kahn <raan@ngcable.com>
- ISA Retainer
- From: =?iso-2022-jp?B?GyRCRU1KRiEhRTAbKEo=?= <To_Tomai@nitta.co.jp>
- Low Profile PCI Question
- From: Takashi Nakamura <takashi_nakamura@yokogawa.co.jp>
- RE: PCI Reset (Revision 2.1 Vs. 2.2 of PCI)
- From: Lame Brooks-G14738 <Brooks_Lame@mcg.mot.com>
- PCI Reset (Revision 2.1 Vs. 2.2 of PCI)
- From: Phil Cupryk <pcupryk@matrox.com>
- RE: Compliance?? Thanks
- From: Rob LaMoreaux <RLaMoreaux@BTE-US.com>
- RE: Compliance??
- From: Garnett Hamilton <GHamilton@chrysalis-its.com>
- Compliance??
- From: Rob LaMoreaux <RLaMoreaux@BTE-US.com>
- Burst read
- From: Cadez Borut RDHW <b.cadez@iskratel.si>
- It does work, I tested it myself
- From: <jtffd35@mailhost.cs.auc.dk>
- PCI IO illegal addressing
- From: Raan Kahn <raan@ngcable.com>
- Re: DEVSEL# timing in status register
- From: Richard Walter <rwalter@corp.auspex.com>
- DEVSEL# timing in status register
- From: Marco L Forcone <Forcone@ILCDDC.COM>
- Conduction Cooled PMC
- From: Ivor Bowden <ivor@peritek.com>
- CPC710
- From: "Doron Tal" <doront@iprad.co.il>
- About PCI Expansion ROM and Option ROM?
- From: "Xiaoming Dong" <xmdong@263.net>
- RE: PCI add-on cards compliance cartificate
- From: Cabral Robert-G14714 <Robert_Cabral@mcg.mot.com>
- RE: PCI add-on cards compliance cartificate
- From: Lame Brooks-G14738 <Brooks_Lame@mcg.mot.com>
- PCI add-on cards compliance cartificate
- From: Ilan Ossdon - Israel <ILANO@gilat.com>
- Anyone know of a PMC based Hard Drive...
- From: "Brock L. Myers" <bmyers@divi.com>
- Tolerance
- From: Robert Wiberg <Robert.Wiberg@uab.ericsson.se>
- Looking for embedded processor with a PCI interface
- From: Steve Turner <Steve.Turner@motionmedia.co.uk>
- RE: ISA Retainer for PCI Card
- From: Lame Brooks-G14738 <Brooks_Lame@mcg.mot.com>
- WG: ISA Retainer for PCI Card
- From: Mahler Willi <Willi.Mahler@icn.siemens.de>
- ISA Retainer for PCI Card
- From: Mahler Willi <Willi.Mahler@icn.siemens.de>
- Recall: ISA Retainer for PCI Card
- From: Mahler Willi <Willi.Mahler@icn.siemens.de>
- Recall: ISA Retainer for PCI Card
- From: Mahler Willi <Willi.Mahler@icn.siemens.de>
- 3.3V Power Supply
- From: "Peter George" <petergeorge@lineone.net>
- Multiport serial adapter
- From: Takashi Nakamura <takashi_nakamura@yokogawa.co.jp>
- RE: 3.3V power supply.
- From: "Ingraham, Andrew" <Andrew.Ingraham@compaq.com>
- 3.3V power supply.
- From: "Peter George" <petergeorge@lineone.net>
- RE: Low profile PCI Local bus
- From: "June Lai" <jul@spower.com> (by way of Daniel Weaver <danw@znyx.com>)
- RE:Low profile PCI Spec.
- From: "June Lai" <jul@spower.com> (by way of Daniel Weaver <danw@znyx.com>)
- PCI-PCI Bridge : Tundra PowerSpan / GT-64130
- From: "Doron Tal" <doront@iprad.co.il>
- RE: below 1M BAR behind a PCI-PCI bridge
- From: Lame Brooks-G14738 <Brooks_Lame@mcg.mot.com>
- RE: Right angle adapter stub length ?
- From: "Ingraham, Andrew" <Andrew.Ingraham@compaq.com>
- Right angle adapter stub length ?
- From: Joel Brown <joel@zmicro.com>
- RE: OK to use PCI slot right angle expander ?
- From: Keith Jasinski <jasinski@mortara.com>
- OK to use PCI slot right angle expander ?
- From: Joel Brown <joel@zmicro.com>
- Card behind a PCI-PCI bridge
- From: "Benedict Chong" <bensbrain@hotmail.com>
- RE: Interrupt Pin Assignments
- From: Lame Brooks-G14738 <Brooks_Lame@mcg.mot.com>
- some Spec about PCI2.1 Standard
- From: Gary Lau <hkalu@pacific.net.hk>
- Interrupt Pin Assignments
- From: "Gomi, Robin" <r.gomi@neccsd.com>
- Design for Local Side Clock
- From: Frank Walker <frank_walker@bigfoot.com>
- PCI-X draft and final 1.0 Spec.
- From: "Swapnajit Mittra" <mittra@my-deja.com>
- Adding PCI to StrongArm SA1100
- From: brent@lardav.com (Brent Crosby)
- RE: Real PCI Clock Rates
- From: Ivor Bowden <ivor@peritek.com>
- RE: Real PCI Clock Rates
- From: Ivor Bowden <ivor@peritek.com>
- RE: Real PCI Clock Rates
- From: "Ingraham, Andrew" <Andrew.Ingraham@compaq.com>
- RE: Real PCI Clock Rates
- From: Ivor Bowden <ivor@peritek.com>
- RE: Real PCI Clock Rates
- From: "Ingraham, Andrew" <Andrew.Ingraham@compaq.com>
- Real PCI Clock Rates
- From: Frank Walker <frank_walker@bigfoot.com>
- Re: looking for single board computer with 64-bit PCI
- From: Joerg Langwald <Joerg.Langwald@dlr.de>
- Fw: PCI-IP-Core
- From: "Markus Petrinka" <markus.petrinka@sorep.com>
- Inquiry of Bootable PCI Device!
- From: oneyjs@samsung.co.kr
- Re: looking for single board computer with 64-bit PCI
- From: "John Birkner" <birkner@quicklogic.com>
- hello
- From: Manager <manager@m2.mail.net>
- PCI Compliance testing
- From: Paolo Maiorana <Paolo.U.Maiorana@jpl.nasa.gov>
- Unidentified subject!
- From: Pieter de Kock <Pieter.deKock@DataVoice.co.za>
- subcribe
- RE: 1 IRQ line for all bridged dev? RE: prob w/PCI add-in cards w /PCI 2PCI bridge on it
- From: Shepard Bob-G14751 <Bob.Shepard@motorola.com>
- RE: RE: RE: 1 IRQ line for all bridged dev? RE: prob w/PCI add-in cards w/PCI 2PCI bridge
- From: Lame Brooks-G14738 <Brooks_Lame@mcg.mot.com>
- RE: RE: 1 IRQ line for all bridged dev? RE: prob w/PCI add-in cards w/PCI 2PCI bridge on it
- From: Lame Brooks-G14738 <Brooks_Lame@mcg.mot.com>
- Re: 1 IRQ line for all bridged dev? RE: prob w/PCI add-in cards w/PCI 2PCI bridge on it
- From: "Peter Marek" <peter.marek@dn1.de>
- AW: 1 IRQ line for all bridged dev? RE: prob w/PCI add-in cards w/PCI 2PCI bridge on it
- From: "Lange, Michael" <lange@dvs.de>
- 1 IRQ line for all bridged dev? RE: prob w/PCI add-in cards w/PCI2PCI bridge on it
- From: Lame Brooks-G14738 <Brooks_Lame@mcg.mot.com>
- AW: problem with PCI add-in cards with a PCI2PCI bridge on it
- From: "Lange, Michael" <lange@dvs.de>
- Re: PCI clock line length
- RE: PMC Signals BUSMODE
- From: Lame Brooks-G14738 <Brooks_Lame@mcg.mot.com>
- Re: PMC Signals BUSMODE
- From: "Lorne J. Levinson" <Lorne.Levinson@weizmann.ac.il>
- PMC Signals BUSMODE
- From: Mahler Willi <Willi.Mahler@icn.siemens.de>
- LP-PCI Spec.
- From: "jack" <jack@in-win.com.tw>
Mail converted by MHonArc 2.5.2