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- Re: Prefetched Data Discard Rules, ALi M1531B
- From: David See <davids@research.canon.com.au>
- PCI 2.1 SubSystem ID ECN
- From: "entropy" <entropy8@excite.com>
- Compact PCI Trace Lengths
- From: "Bielski, Scott (MED)" <Scott.Bielski@amermsx.med.ge.com>
- RE: PCI Motherboard Conventions
- From: Adam Hutchin <adamh@3dfx.com>
- RE: Power Supply FAL# Signal Applications
- From: Brooks Lame <Brooks_Lame@mcg.mot.com>
- Power Supply FAL# Signal Applications
- From: "Bielski, Scott (MED)" <Scott.Bielski@amermsx.med.ge.com>
- RE: PCI Motherboard Conventions
- From: "Ingraham, Andrew" <Andrew.Ingraham@compaq.com>
- PCI DMA problem
- From: Gordon Brown <brown@signal.dera.gov.uk>
- WG: Is BAR = 0x0000.0000 and mem space =1 decoded?
- From: Peleska Pavel <Pavel.Peleska@icn.siemens.de>
- Re: PCI DMA problem
- From: Johannes Steigerwald <hannes.steigerwald@ops.de>
- PCI Motherboard Conventions
- From: Gabe Fitch <GFITCH@BARRSYS.COM>
- Re: PCI reset question.
- From: brians@Aureal.com (Brian Sassone)
- Hot Swap Enum trigger
- From: Sam Detweiler <sam_detweiler@ibm.net>
- Re: PCI DMA problem
- From: "John R Pierce" <pierce@hogranch.com>
- PCI DMA problem
- From: Gordon Brown <brown@signal.dera.gov.uk>
- PCI SIG Annual Meeting Notice
- From: Richard Baek <rbaek@vtm-inc.com>
- power monitor
- From: "Walt" <walt@vistacc.com>
- Is BAR = 0x0000.0000 and mem space =1 decoded?
- From: Peleska Pavel <Pavel.Peleska@icn.siemens.de>
- Compact PCI Trace Lengths
- From: "Bielski, Scott (MED)" <Scott.Bielski@amermsx.med.ge.com>
- PCI 2.2 Compliance Checklist
- From: charles.pummill@amd.com
- Regarding PCI-X Specification
- From: Sikkandar Badhusha <sikk@netlab.hcltech.com>
- RE: PCI Pullup requirements/restrictions
- From: "Ingraham, Andrew" <Andrew.Ingraham@compaq.com>
- PCI Pullup requirements/restrictions
- From: "Moy, Jamie" <jamie.moy@intel.com>
- Re: Address Phase duration
- From: Steven Larky <larky@anchorchips.com>
- Address Phase duration
- From: Marco L Forcone <Forcone@ILCDDC.COM>
- Questions PCI
- From: "Vicente Ernesto Castro Mesa" <e221263@ingenieria.ingsala.unal.edu.co>
- Mixed Voltage on Compact PCI Boards
- From: "Bielski, Scott (MED)" <Scott.Bielski@amermsx.med.ge.com>
- RE: PCI reset question.
- From: David Cline <DavidC@motioneng.com>
- Re: PCI Burst length limited by PCI arbiter?
- From: Alan Deikman <Alan.Deikman@znyx.com>
- Re: PCI Burst length limited by PCI arbiter?
- From: Steven Larky <larky@anchorchips.com>
- RE: PCI reset question.
- From: Jeff Dahlin <JDahlin@appiangraphics.com>
- Re: PCI reset question.
- From: Steven Larky <larky@anchorchips.com>
- PCI reset question.
- From: cbrake@codonics.com (Cliff Brake)
- RE: PCI Printed Circuit Board Design
- From: "Ingraham, Andrew" <Andrew.Ingraham@compaq.com>
- Half-size PCI card?
- From: ALBERT <albert@sc.com.tw>
- PCI Burst length limited by PCI arbiter?
- From: Uwe Kirst <kirst@dvs.de>
- proper PCB layout
- From: Dan DeConinck <hrt@planeteer.com>
- AW: PCI Printed Circuit Board Design
- From: Peter Marek <peter.marek@dn1.de>
- Re: PCI Printed Circuit Board Design
- From: Ross Harvey <ross@ghs.com>
- PCI Printed Circuit Board Design
- From: Alan Deikman <Alan.Deikman@znyx.com>
- PCI Printed Circuit Board Design
- From: Steve Haynal <haynal@umbra.ece.ucsb.edu>
- RE: debug
- From: "Schneider, Dave" <Dave.Schneider@emulex.com>
- Re: Point of Order issues
- From: Alan Deikman <Alan.Deikman@znyx.com>
- RE: Point-of-order issue (was: RE: PCI ...)
- From: Ivor Bowden <ivor@peritek.com>
- Re: Point-of-order issue (was: RE: PCI ...)
- From: Ivor Bowden <ivor@peritek.com>
- Re: PCI specification
- From: Ivor Bowden <ivor@peritek.com>
- PCI specification
- From: JiFengLi <ljfww@public.cs.hn.cn>
- RE: debug
- From: Dan Mick <dan.mick@West.Sun.COM>
- RE: Point-of-order issue (was: RE: PCI ...)
- From: Brooks Lame <Brooks_Lame@mcg.mot.com>
- Lack of PCI Compliance of PLX's PCI 9054 I/O buffers
- From: "O'Shea, David J" <david.j.oshea@intel.com>
- Re: Point-of-order issue (was: RE: PCI ...)
- From: Robert Monaco <rmonaco@paradigm-inc.com>
- Point-of-order issue (was: RE: PCI ...)
- From: Alan Deikman <Alan.Deikman@znyx.com>
- RE: debug
- From: Ivor Bowden <ivor@peritek.com>
- RE: PCI Compliance of PLX's PCI 9054 I/O buffers
- From: Douglas Gilligan <doug@znyx.com>
- RE: debug
- From: Dave New <NewD@esi.com>
- Re: debug
- From: Ivor Bowden <ivor@peritek.com>
- PCI Device Driver
- From: Scott Streit <streit@blake.sdsu.edu>
- RE: PCI Compliance of PLX's PCI 9054 I/O buffers
- From: "Schutt, Tom" <Tom.Schutt@splashtech.com>
- RE: debug
- From: Dave New <NewD@esi.com>
- RE: PCI Compliance of PLX's PCI 9054 I/O buffers
- From: "O'Shea, David J" <david.j.oshea@intel.com>
- Re: Regarding Snoop pins
- From: "Bruce Young" <bayoung@frontiernet.net>
- RE: debug
- From: Dan Mick <dan.mick@West.Sun.COM>
- RE: PCI Compliance of PLX's PCI 9054 I/O buffers
- From: Brooks Lame <Brooks_Lame@mcg.mot.com>
- pci mgroup
- From: Scott Best <sbest@best.com>
- PCI Compliance of PLX's PCI 9054 I/O buffers
- From: Bill Brisko <bbrisko@plxtech.com>
- Re: debug
- From: Ivor Bowden <ivor@peritek.com>
- RE: debug
- From: Dave New <NewD@esi.com>
- RE: RE: PICMG PCI backplanes
- From: Brooks Lame <Brooks_Lame@mcg.mot.com>
- RE: debug
- From: Dave New <NewD@esi.com>
- debug
- From: "Kevin Greaves" <keving@visionpro.com>
- RE: PCIRf: Warning to PLX PCI9054 users!
- From: Kevin Sharpe <ksharpe@datakinetics.co.uk>
- Video card Questions
- From: Adam Hutchin <adamh@3dfx.com>
- RE: 12 V power usage
- From: Jeff Dahlin <JDahlin@appiangraphics.com>
- AW: 12 V power usage
- From: "Lange, Michael" <lange@dvs.de>
- 12 V power usage
- From: "Witalka, Jerome J" <Jerome.Witalka@UNISYS.com>
- PICMG PCI backplanes
- From: Dave Johnston <djohnston@VideoServer.com>
- Regarding Snoop pins
- From: "pks" <pks@netlab.hcltech.com>
- Window size for I/O connectors
- From: "Calle, Jaime" <JC121128@exchange.SanDiegoCA.NCR.COM>
- Passive backplane for both 32-bit & 64-bit SBC interfaces?
- From: Richard Walter <rwalter@corp.auspex.com>
- Re: Self-mastering?
- From: Shawn Clayton <clayton@giganet.com>
- RE: Self-mastering?
- From: Andrew Ingraham <Andrew.Ingraham@digital.com>
- PCIRf: Warning to PLX PCI9054 users!
- From: Keith Jasinski <jasinski@mortara.com>
- Re: Self-mastering?
- From: Robert Monaco <rmonaco@paradigm-inc.com>
- Rev. 2.2 mechanically confusing
- From: "Gregory C. Read" <gread@voicenet.com>
- Re: Self-mastering?
- From: Shawn Clayton <clayton@giganet.com>
- RE: Self-mastering?
- From: Andrew Ingraham <Andrew.Ingraham@digital.com>
- Re: Prefetched Data Discard Rules
- From: Takashi Nakamura <takashi_nakamura@yokogawa.co.jp>
- Re: Self-mastering?
- From: Steven Larky <larky@anchorchips.com>
- Re: Self-mastering?
- From: Takashi Nakamura <takashi_nakamura@yokogawa.co.jp>
- Re: Self-mastering?
- From: wen-king@myri.com (Wen-King Su)
- Re: Self-mastering?
- From: Alan Deikman <Alan.Deikman@znyx.com>
- Re: Self-mastering?
- From: stevep@lsi.sel.sony.com (Steve Pham)
- Re: Self-mastering?
- From: Drew Eckhardt <drew@Poohsticks.Org>
- Re: Self-mastering?
- From: Alan Deikman <Alan.Deikman@znyx.com>
- PCI Specification revision numbers
- From: "Bowers, AllynX K" <allynx.k.bowers@intel.com>
- RE: signal voltage question
- From: Andrew Ingraham <Andrew.Ingraham@digital.com>
- Re: Self-mastering?
- From: Drew Eckhardt <drew@Poohsticks.Org>
- signal voltage question
- From: "Wyatt C. Francis" <wcf1@Ra.MsState.Edu>
- Questions PCI
- From: "Vicente Ernesto Castro Mesa" <e221263@ingenieria.ingsala.unal.edu.co>
- Self-mastering?
- From: Robert Monaco <rmonaco@paradigm-inc.com>
- RE: Ich requirement in 3.3V signaling environments
- From: Andrew Ingraham <Andrew.Ingraham@digital.com>
- Re: PCI bus suspension for 3 to 4 milli second
- From: Ken Crocker <kcrocker@kcconsulting.com>
- PCI bus suspension for 3 to 4 milli second
- From: Eric Toussaint <toussaint@epc.be>
- Ich requirement in 3.3V signaling environments
- From: Keith Jasinski <jasinski@mortara.com>
- Re: PCIRf: How to access PCI Exp. cards in DOS
- From: Ivor Bowden <ivor@peritek.com>
- RE: PCIRf: How to access PCI Exp. cards in DOS
- From: "Dunlap, Randy" <randy.dunlap@intel.com>
- Re: PCIRf: How to access PCI Exp. cards in DOS
- From: "John R Pierce" <pierce@hogranch.com>
- PCIRf: How to access PCI Exp. cards in DOS
- From: Keith Jasinski <jasinski@mortara.com>
- Prefetched Data Discard Rules
- From: Takashi Nakamura <takashi_nakamura@yokogawa.co.jp>
- Re: shared memory in a multiprocessor system
- From: Guenter Graf <gugr@force.de>
- shared memory in a multiprocessor system
- From: "Ratzel, Frank" <fra@msc-ge.com>
- Do anyone know what happened about ETS (embeded telephony solution)company?
- From: "liuweidong" <liuweid@public.sj.he.cn>
- Cache coherency with ALi M1531 (Aladdin IV)
- From: David See <davids@research.canon.com.au>
- Re: WIndowsNT "snoop" cycles before doing DMA
- From: "Jeff" <jmd@audio2.engr.sgi.com>
- re: WIndowsNT "snoop" cycles before doing DMA
- From: Alan Deikman <Alan.Deikman@znyx.com>
- subscribe
- From: Alois Lichtenstern <AloisLi@icp.siemens.com>
- WIndowsNT "snoop" cycles before doing DMA
- From: "Lange, Michael" <lange@dvs.de>
- Mailing list SPAM
- From: Daniel Weaver <danw@znyx.com>
- unsubscribe
- From: "Jeff Reeve" <jreeve@euphonix.com>
- PCI Steering Committee Nominations
- From: Richard Baek <rbaek@vtm-inc.com>
- Be Your Own Boss! Work from Home!!
- Home Based Opportunity! Serious Income!!
- subscribe pci rramudu@netscape.net
- From: ramudu ramudu <rramudu@netscape.net>
- Home Based Biz! 2-4k per wk!!!!
- AGP interface for PCI device
- From: tsang@IMPACT.Xerox.COM (Alan Tsang)
- 64 bit and/or 66MHz chipsets
- From: Craig Rich <craig_rich@sundanceti.com>
- subscribe
- From: Jayant Talajia <jayant.talajia@mayannetworks.com>
- unsubscribe
- From: Greg Loxtercamp <gregl@ncube.com>
- info on PCI card market
- From: "Beck, Kim" <beck@sharpsec.com>
- Re: PCI BIOS Implementation
- From: "John R Pierce" <pierce@hogranch.com>
- RE: PCI BIOS Implementation
- From: "Hazzah, Karen" <KHazzah@melita.com>
- PCI BIOS Implementation questons
- From: Patrick Maupin <pmaupin@jump.net>
- PCI SIG newsletter (Winter '99)
- From: Richard Baek <rbaek@vtm-inc.com>
- subscribe
- From: "wayne martin" <wmartin45@hotmail.com>
- FW: PCI IDE programming byte
- From: "Hajime Nozaki" <nzk@pc2.fc.nec.co.jp>
- Any reports about PCI-X and NGIO?
- From: Alan Deikman <Alan.Deikman@znyx.com>
- subscribe
- From: Sjoerd Velthuijsen <s.velthuysen@crypto.philips.com>
- 66MHz PCI Chipset Manufacturers.
- From: Craig Rich <craig_rich@sundanceti.com>
- pcipost.exe and SIG Foxfire test card
- From: Brooks Lame <Brooks_Lame@mcg.mot.com>
- Re: ISA BUS Master
- From: "John R Pierce" <pierce@hogranch.com>
- Re: BAR's less than 0x1000
- From: roy@roke.com (Roy Gwinn)
- BAR's less than 0x1000
- From: Mike Dini <mdini@dinigroup.com>
- ISA BUS Master
- Interrupt routing with PCI-PCI bridge
- From: Tai Phan <phan@iphase.com>
- RE: Motherboard Impedance for PCI bus
- From: Andrew Ingraham <Andrew.Ingraham@digital.com>
- RE: PCI IDE programming byte
- From: Pierre-Yves Santerre <pierreys@MICROSOFT.com>
- Motherboard Impedance for PCI bus
- From: Daniel Roganti <droganti@lucent.com>
- subscribe
- From: "Sharmila C. Ganesan" <sharmila@vsnl.com>
- Re: PCI IDE programming byte
- From: Dan Mick <dan.mick@West.Sun.COM>
- HC11 - PCI AND HDLC CONTROLLER
- From: Yariv Saleternik <YarivS@gilat.com>
- PCI IDE programming byte
- From: Dan Mick <dan.mick@West.Sun.COM>
- ACK64 Question
- From: "Calle, Jaime" <jaime@trans.SanDiegoCA.ncr.com>
- RE: 3.3V Power on 5V X86 motherboards
- From: Andrew Ingraham <Andrew.Ingraham@digital.com>
- RE: Subsystem Vendor ID assignment
- From: "O'Shea, David J" <david.j.oshea@intel.com>
- RE: Subsystem Vendor ID assignment
- From: Dave New <NewD@esi.com>
- FW: Subsystem Vendor ID assignment
- From: Keith Jasinski <jasinski@mortara.com>
- RE: Subsystem Vendor ID assignment
- From: Dave New <NewD@esi.com>
- RE: Subsystem Vendor ID assignment
- From: Brooks Lame <Brooks_Lame@mcg.mot.com>
- RE: Unidentified subject!
- From: Dave New <NewD@esi.com>
- RE: Subsystem Vendor ID assignment
- From: Dave New <NewD@esi.com>
- Subsystem Vendor ID assignment
- From: Joe Derham <joed@voicenet.com>
- QSpan (CA91C860) TUNDRA
- From: Yariv Saleternik <YarivS@gilat.com>
- PCI64/66MHz card
- From: Michel Ritondale <mri@kalliste.cetia.fr>
- 64 bit motherboards
- From: kfrobinson <kfrobinson@micron.com>
- Re: FPGA can not read PCI CLK !!??
- From: Anthony Clark <clark@mgi.com>
- 3.3v PCI supply card RE: 3.3V Power on 5V X86 motherboards
- From: Brooks Lame <Brooks_Lame@mcg.mot.com>
- unsubscribe
- From: Andrew Bartczak <ajb@vidal.emsr.lucent.com>
- 3.3V Power on 5V X86 motherboards
- From: "Mike Bova" <Mike.Bova@crc.ca>
- Unidentified subject!
- From: Joe Derham <joed@adelphia.net>
- signal's slew rate tolerance
- FPGA reading PCI clock
- From: Dan DeConinck <hrt@planeteer.com>
- FPGA can not read PCI CLK !!??
- From: Dan DeConinck <hrt@planeteer.com>
- burst r/w
- From: Dan DeConinck <hrt@planeteer.com>
- RE: burst r/w
- From: Dave New <NewD@esi.com>
- I/O Space allocation rules?
- From: Bruce Rosenkrantz <brosen@mcg.mot.com>
- PMC power
- From: Ivor Bowden <ivor@peritek.com>
- Re: Bugs in State Machine of PCI Local Bus Spec
- From: Dong Wang <dongw@cs.cmu.edu>
- NEW HP E2940A CompactPCI Exerciser & Analyzer
- From: ACHIM_LOESCH@HP-Germany-om1.om.hp.com
- RE: PCI trace impedance (Unidentified subject!)
- From: Andrew Ingraham <Andrew.Ingraham@digital.com>
- Unidentified subject!
- From: "Gigandet, Scott" <gigandet@northc.com>
- RE: Controller for 33/66 MHz - PCI9610 - a glue less 64b/66MHz I/F chip to PowerQUICC 2 - MPC8260
- From: "Gigandet, Scott" <gigandet@northc.com>
- subscribe
- From: "Pramod S. Sonavane" <pss@cromp.ernet.in>
- Spec ver 2.2
- From: Moshe Hillel <moshe_hillel@easx.co.il>
- Re: Controller for 33/66 MHz - PCI9610 - a glue less 64b/66MHz I/F chip to PowerQUICC 2 - MPC8260
- From: Mitch Kahn <mitch@demoworks.com>
- Bugs in State Machine of PCI Local Bus Spec
- From: Dong Wang <dongw@cs.cmu.edu>
- HPDI register mapping
- From: Peter Carrigan <petec@acres.com.au>
- RE: PMC 3.3V power
- From: Ivor Bowden <ivor@peritek.com>
- unsubscribe
- From: don thompson <dont@std.teradyne.com>
- Re: Bandwidth limitation with Memory Read command
- From: tannhauser@crf.canon.fr
- subscribe
- From: John_Doody@stratus.com
- RE: PCI bus 3.3V to 5V addapter card
- From: Andrew Ingraham <Andrew.Ingraham@digital.com>
- Re: Controller for 33/66 MHz - PCI9610 - a glue less 64b/66MHz I/F chip to PowerQUICC 2 - MPC8260
- From: Yoav Lavi <yoav@ast.co.il>
- Controller for 33/66 MHz
- From: Thomas Rathgen <thomas.rathgen@rz.tu-ilmenau.de>
- RE: PCIRefelector: Power only?
- From: Andrew Ingraham <Andrew.Ingraham@digital.com>
- RE: PMC 3.3V power
- From: Andrew Ingraham <Andrew.Ingraham@digital.com>
- Re: Bandwidth limitation with Memory Read command
- From: Graeme Gill <graeme@colorbus.com.au>
- Mini PCI Specification
- From: "Jalbert, Karl" <JalberKJ@bergelect.com>
- Bandwidth limitation with Memory Read command
- WHY A PCI BOARD IS NOT DETECTED ?
- From: Antonio Joaquim A Esteves <esteves@di.uminho.pt>
- Re: WHY A PCI BOARD IS NOT DETECTED ?
- From: "Wyatt C. Francis" <wcf1@Ra.MsState.Edu>
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