Mail Index

• Thread Index

• PMC 3.3V power
  • From: Ivor Bowden <ivor@peritek.com>
• 64b/66MHz cards
  • From: ALEXANDRE_ESPINASSE@HP-France-om9.om.hp.com
• Should data be valid on a STOP_RETRY
  • From: wiwel@us.ibm.com
• PCIRefelector: Power only?
  • From: Keith Jasinski <jasinski@mortara.com>
• subscribe
  • From: "Ludovic Grossin" <lgrossin@froudeconsine.co.uk>
• Compliance for PCI Specifications
  • From: "DEEPAK KUMAR " <deepakkumar@excite.com>
• Compliance for PCI Specifications
  • From: avijay@excite.com
• FW: Interrupt Line Register
  • From: Pierre-Yves Santerre <pierreys@MICROSOFT.com>
• Interrupt Line Register
  • From: Jeff Thiesen <jeffth@microsoft.com>
• Re: PCI Device Number Assignment Rules
  • From: Takashi Nakamura <takashi_nakamura@yokogawa.co.jp>
• PCI Device Number Assignment Rules
  • From: pcupryk@matrox.com
• Can two processor boards reside in one CPCI shelf?
  • From: liuweidong <liuweid@public.sj.he.cn>
• PCI bus mastering
  • From: "Priyabrata Das" <das_priyabrata@hotmail.com>
• Clarification on the status of PCI-X
  • From: Richard Baek <rbaek@vtm-inc.com>
• unsuscribe
  • From: Jayaprakash B <bprakash@cedt.iisc.ernet.in>
• Re: Sustained Periods of Retries?
  • From: Graeme Gill <graeme@colorbus.com.au>
• Re: Sustained Periods of Retries?
  • From: brians@Aureal.com (Brian Sassone)
• Sustained Periods of Retries?
  • From: Tom Keaveny <tak@core.rose.hp.com>
• Special Cycles
  • From: "Russell Frydryck" <russell@datacube.com>
• RE: Minimum reset pulse width?
  • From: Brooks Lame <Brooks_Lame@mcg.mot.com>
• 64 bit bus extension problem
  • From: Sudhirranjan Proch <sudhiranjan@dcmds.co.in>
• Minimum reset pulse width?
  • From: homann@erv.ericsson.se (Magnus Homann)
• hi
  • From: hj7@gafsun3.gaf.de
• subscribe
  • From: "Aizawa, Tomoya" <tommy@klsi.com>
• SUBSCRIBE mailing list
  • From: "=?big5?B?qEirT6n6?=" <860521@ccl.itri.org.tw>
• Re: Devices cannot drive and recieve signals at the same time?
  • From: Takashi Nakamura <takashi_nakamura@yokogawa.co.jp>
• RE: 3.3v parts in a 5V signaling environment
  • From: "Paul Ramsden" <ramsden@nortelnetworks.com>
• Re: Devices cannot drive and recieve signals at the same time?
  • From: Kevin.Normoyle@Eng.Sun.COM (Kevin Normoyle)
• Re: Devices cannot drive and recieve signals at the same time?
  • From: wen-king@myri.com (Wen-King Su)
• Devices cannot drive and recieve signals at the same time?
  • From: Steve Novak <Steve.Novak@amd.com>
• Unsubscribe
  • From: John Gleeson <jkg@indigo.ie>
• Subscribe
  • From: John Gleeson <jkg@indigo.ie>
• Unsubscribe
  • From: John Gleeson <jkg@indigo.ie>
• Revision 2.2 -- Any changes from the draft version?
  • From: Mike Dini <mdini@dinigroup.com>
• MONEY
  • From: gghk@mci.com
• PCI Spec revision finished and available
  • From: Richard Baek <rbaek@vtm-inc.com>
• RE: 3.3v parts in a 5V signaling environment
  • From: Andrew Ingraham <Andrew.Ingraham@digital.com>
• 3.3v parts in a 5V signaling environment
  • From: Ron Cline <Ron.Cline@abq.sc.philips.com>
• Looking for 64bit/66MHz Systems
  • From: Chelman Wong <chelman@hal.com>
• Re: NT restart without regular shutdown
  • From: roy@roke.com (Roy Gwinn)
• NT restart without regular shutdown
  • From: Takashi Nakamura <takashi_nakamura@yokogawa.co.jp>
• Galileo GT64011-P-1 BIOS Exp. ROM
  • From: "Finichiu György" <finisch@freemail.c3.hu>
• PCI Compliance Workshop #17
  • From: Richard Baek <rbaek@vtm-inc.com>
• FW: Bus Power Management Question
  • From: Gabe Fitch <GFITCH@BARRSYS.COM>
• RE: 3.3V pci slot only !!!
  • From: Andrew Ingraham <Andrew.Ingraham@digital.com>
• signal integrity problem on passive PCI backplanes
  • From: "Lange, Michael" <lange@dvs.de>
• 3.3V pci slot only !!!
  • From: Olivier Auberson <Olivier.Auberson@merging.com>
• Interrupt routing and device number
  • From: Tai Phan <phan@iphase.com>
• Well known register interface for ECP mode
  • From: "K Kibria" <kkibria@iss-us.com>
• PCI-X specification
  • From: alpham@advansys.com (Al Pham)
• RE: PCI with 5V tolerant 3.3 volt devices
  • From: Andrew Ingraham <Andrew.Ingraham@digital.com>
• SPAM on the list
  • From: Alan Deikman <Alan.Deikman@znyx.com>
• hi
  • From: u5@pointer-systems.de
• PCI with 5V tolerant 3.3 volt devices
  • From: Ron Cline <Ron.Cline@abq.sc.philips.com>
• hi
  • From: frt6@pointer-systems.de
• subscribe
  • From: "Mike Izquierdo" <mikeiz@clarinet.mmac.com>
• PCISIG: Request advice on passing config info to drivers
  • From: "George Pauley" <gpauley@3a.com>
• Re: multi function answers
  • From: Dan Mick <dan.mick@West.Sun.COM>
• Bus Power Management Question
  • From: Gabe Fitch <GFITCH@BARRSYS.COM>
• Re: multi function answers
  • From: "K Kibria" <kkibria@iss-us.com>
• multi function answers
  • From: "Philip Ronzone" <Philip.Ronzone@eng.efi.com>
• Multi-function PCI devices
  • From: "K Kibria" <kkibria@iss-us.com>
• RE: Reading Base Address Registers
  • From: Brooks Lame <Brooks_Lame@mcg.mot.com>
• subscribe
  • From: Waining Ng <Waining.Ng@Eng.Sun.COM>
• Reading Base Address Registers
  • From: "Scott C. Karlin" <scott@CS.Princeton.EDU>
• PCISIG: Requesting advice on memory allocation strategy...
  • From: "George Pauley" <gpauley@3a.com>
• subscribe
  • From: Brian Boschma <bboschma@auravision.com>
• D3 state change to (slot specific/system) power off
  • From: billyz@us.ibm.com
• Re: PCI compliance and UL approval - is it possible?
  • From: "Michael Attenborough"<mike@brainboxes.com>
• Newbie question about PCI interrupts
  • From: "O'Shea, David J" <david.j.oshea@intel.com>
• Newbie question about PCI interrupts
  • From: "George Pauley" <gpauley@3a.com>
• Re: Q: Do the Trace lengths in PCI spec v21. apply to PMC hardware ?
  • From: Ivor Bowden <ivor@peritek.com>
• Q: Do the Trace lengths in PCI spec v21. apply to PMC hardware ?
  • From: Daniel Roganti <droganti@lucent.com>
• RE: PCI compliance and UL approval - is it possible?
  • From: 471034N@knotes.kodak.com
• Re: PCI compliance and UL approval - is it possible?
  • From: 471034N@knotes.kodak.com
• PCI to Serial port chip.
  • From: Ilan Ossdon <ILANO@gilat.com>
• PCI compliance and UL approval - is it possible?
  • From: "Michael Attenborough"<mike@brainboxes.com>
• PCI test tools questionnaire
  • From: ACHIM_LOESCH@HP-Germany-om1.om.hp.com
• re: PCI to UTOPIA-2
  • From: Alan Deikman <Alan.Deikman@znyx.com>
• PCI Bus Motherboards
  • From: Kris Caylor <rockdoc@mediaone.net>
• PCI Bus Motherboards
  • From: Kris Caylor <rockdoc@mediaone.net>
• PCI to UTOPIA-2
  • From: "" <NOAME@ORCKIT.COM>
• Test Message and Season's Greetings
  • From: Alan Deikman <Alan.Deikman@znyx.com>
• pci querry
  • From: "Botlaguduru srinivas" <botlaguduru_s@hotmail.com>
• Re: Data rate on PCI/AGP
  • From: "John R Pierce" <pierce@hogranch.com>
• Re: Data rate on PCI/AGP
  • From: Neal Palmer <neal@dinigroup.com>
• Subscribe
  • From: "Janice Meeuwsen" <janice@pc2.com>
• Re: no clock in address/command phase
  • From: Richard Walter <rwalter@corp.auspex.com>
• Re: Multiple local bus reads
  • From: "Monish Shah" <monish@poboxes.com>
• no clock in address/command phase
  • From: "K. Y. Chan" <kychan@hintcorp.com>
• PCI-X dead or alive?
  • From: Peleska Pavel <Pavel.Peleska@icn.siemens.de>
• Subscribe
  • From: banglee@samsung.co.kr
• Re: Sharing PCI configuration memory
  • From: "John R Pierce" <pierce@hogranch.com>
• Sparc Ultra60 U2P chip bug
  • From: wen-king@myri.com (Wen-King Su)
• Sharing PCI configuration memory
  • From: Paolo Tabacco <mc4759@mclink.it>
• request mailing for list.
  • From: "=?euc-kr?B?wMy9wsivKExlZSBTdW5nLUh3YW4=?=" <dootheg@nownuri.net>
• Data rate on PCI/AGP
  • From: "Hr.Groeger ST35" <Hans.Groeger@ops.de>
• RE: Lookinng for an zero-force PCI connector
  • From: Brooks Lame <Brooks_Lame@mcg.mot.com>
• subscribe
  • From: Paul Capes <pcapes@ics-ltd.com>
• Lookinng for an zero-force PCI connector
  • From: ACHIM_LOESCH@HP-Germany-om1.om.hp.com
• subscribe
  • From: "Tor Tovsland" <tor@siconx.com>
• subscribe
  • From: Sandor Lokos <sandor@themis.com>
• RE: 64-bit pci analyzers
  • From: Dave New <NewD@esi.com>
• Re: PCI Board Dimensions
  • From: Mike Dini <mdini@dinigroup.com>
• RE: Memory BAR not being mapped by BIOS
  • From: Brooks Lame <Brooks_Lame@mcg.mot.com>
• Memory BAR not being mapped by BIOS
  • From: "Layne R. Flake" <lflake@iphase.com>
• RE: Looking for Universal PCI VGA-Cards
  • From: Brooks Lame <Brooks_Lame@mcg.mot.com>
• RE: Multiple local bus reads
  • From: Dave New <NewD@esi.com>
• [Fwd: 64-bit pci analyzers]
  • From: Barb Aichinger <barb@futureplus.com>
• PCI Board Dimensions
  • From: engnet engnet <engineering@pacndt.com>
• Looking for Universal PCI VGA-Cards
  • From: Johannes Steigerwald <hannes.steigerwald@ops.de>
• RE: Multi-channel VGA card
  • From: Brooks Lame <Brooks_Lame@mcg.mot.com>
• 64-bit pci analyzers
  • From: Neal Palmer <neal@dinigroup.com>
• Re: Multi-channel VGA card
  • From: 471034N@knotes.kodak.com
• Multiple local bus reads
  • From: Richard Collins - reDSP <redsp@usa.net>
• Re: Multi-channel VGA card
  • From: Mike Dini <mdini@dinigroup.com>
• Re: Multi-channel VGA card
  • From: "John R Pierce" <pierce@hogranch.com>
• Re: Multi-channel VGA card
  • From: "Chuck St. John" <chucks@sequent.com>
• Re: how to buy 21154 P2P bridge eval board
  • From: Garnett Hamilton <ghamilton.deletethis@chrysalis-its.com>
• testing PCI bus
  • From: "Larry Strebel" <larry.strebel@plexus.com>
• RE: Multi-channel VGA card
  • From: Andrew Ingraham <Andrew.Ingraham@digital.com>
• how to buy 21154 P2P bridge eval board
  • From: Neal Palmer <neal@dinigroup.com>
• subscribe
  • From: "Paul Kirk" <paulkirk@bustools.com>
• Multi-channel VGA card
  • From: Van Thai <vthai@awa.com.au>
• RE: PCI Bios extension checksum
  • From: Brooks Lame <Brooks_Lame@mcg.mot.com>
• Q: CompactPCI maillist
  • From: "Perkalskite, Alexander" <aperkalskite@ndsisrael.com>
• Re: PCI Bios extension checksum
  • From: "John R Pierce" <pierce@hogranch.com>
• Re: PCI Bios extension checksum
  • From: "John R Pierce" <pierce@hogranch.com>
• PCI Bios extension checksum
  • From: Tzahi Oved <tzahio@voltaire.com>
• PCI Bios extension checksum
  • From: Tzahi Oved <tzahio@voltaire.com>
• clarification
  • From: ECIL VLSO DESIGN CENTRE ECIL HYDERABAD <ecilvlsi@hd1.vsnl.net.in>
• PCI/PCB Fabrication/Design
  • From: "Wyatt C. Francis" <wcf1@Ra.MsState.Edu>
• RE: expanding the # of pci slots
  • From: Eric Augustine <erica@bit3.com>
• subscribe
  • From: Laurent Bernard <l.s.bernard@usa.net>
• expanding the # of pci slots
  • From: adamkell <clayton@swankarmy.net>
• Re: PCI SIG Test Card
  • From: Richard Baek <rbaek@vtm-inc.com>
• Re: PCI Addressing Conventions
  • From: 061198 <061198@ncp.primenet.com>
• ASIC thermal constraints/guidelines
  • From: "Kayfes, Paul" <pkayfes@icp.siemens.com>
• PCI write transaction
  • From: Cazzatello Gaetano <Gaetano.Cazzatello@CSELT.IT>
• "......." disappears.
  • From: Takashi Nakamura <takashi_nakamura@yokogawa.co.jp>
• ALi's USB uses other than INTA#.
  • From: Takashi Nakamura <takashi_nakamura@yokogawa.co.jp>
• PCI Addressing Conventions
  • From: Steve Stolper <marsguy@ix.netcom.com>
• unsubscribe
  • From: wjy@aluxs.micro.lucent.com (Won Yoon)
• PII NT <-> AMCC S5933 Problem
  • From: Tobias Stumber <Tobias.Stumber@Fr.Bosch.DE>
• RE: RE: Trace length for Interrupt lines
  • From: Brooks Lame <Brooks_Lame@mcg.mot.com>
• PCI SIG Test Card
  • From: <charles_pitchford@phoenix.com> (Charles Pitchford)
• RE: about 64bit pci signals
  • From: Brooks Lame <Brooks_Lame@mcg.mot.com>
• AW: a PCI based data acquisition card
  • From: "Lange, Michael" <lange@dvs.de>
• about 64 bit card plugged into a 32 bit pci slot
  • From: sun zhi-gang <zgsun@nudt.edu.cn>
• RE: about rst# signal
  • From: Andrew Ingraham <Andrew.Ingraham@digital.com>
• RE: Trace length for Interrupt lines
  • From: Andrew Ingraham <Andrew.Ingraham@digital.com>
• about 64bit pci signals
  • From: sun zhi-gang <zgsun@nudt.edu.cn>
• FW: A help required!!!!!
  • From: Ali Najafi - Azfin <alinajafi@hqexchg.aztech.com.sg>
• Re: Improved PCI SIG Newsletter
  • From: "John R Pierce" <pierce@hogranch.com>
• Improved PCI SIG Newsletter
  • From: Richard Baek <rbaek@vtm-inc.com>
• Re: a PCI based data acquisition card
  • From: Richard Collins - reDSP <redsp@usa.net>
• list server is SLOW?
  • From: "John R Pierce" <pierce@hogranch.com>
• Re: querries on PCI
  • From: "John R Pierce" <pierce@hogranch.com>
• a PCI based data acquisition card
  • From: "" <NOAME@ORCKIT.COM>
• RE: querries on PCI
  • From: Ali Najafi - Azfin <alinajafi@hqexchg.aztech.com.sg>
• RE: DMA function
  • From: Ali Najafi - Azfin <alinajafi@hqexchg.aztech.com.sg>
• querries on PCI
  • From: ECIL VLSO DESIGN CENTRE ECIL HYDERABAD <ecilvlsi@hd1.vsnl.net.in>
• querries on PCI
  • From: ECIL VLSO DESIGN CENTRE ECIL HYDERABAD <ecilvlsi@hd1.vsnl.net.in>
• RE: Trace length for Interrupt lines
  • From: Brooks Lame <Brooks_Lame@mcg.mot.com>
• Looking for a PCI-IDE interface controller
  • From: ASHLEY_OSHIRO@ziatech.com
• about rst# signal
  • From: sun zhi-gang <zgsun@nudt.edu.cn>
• RE: help for unix driver
  • From: "Harivansh S. Mehta" <harivansh@dcmds.co.in>
• Trace length for Interrupt lines
  • From: Tai Phan <phan@iphase.com>
• Re: DMA function
  • From: "John R Pierce" <pierce@hogranch.com>
• DMA function
  • From: Moonima Kibria <mkibria@ics.uci.edu>
• Q: Electrical specs. for PMC modules
  • From: Daniel Roganti <droganti@lucent.com>
• Q: BUSMODE siganls in PMC spec IEEE P1386.1/Draft 2.0
  • From: Daniel Roganti <droganti@lucent.com>
• Re: help for unix driver
  • From: "John R Pierce" <pierce@hogranch.com>
• Re[2]: ISA Spec
  • From: Robert_Poulk@alliedtelesyn.com (Robert Poulk)
• Re: help for unix driver
  • From: mek@sco.com
• Re: help for unix driver
  • From: "John R Pierce" <pierce@hogranch.com>
• Re: ISA Spec
  • From: David Cary <d.cary@ieee.org>
• Re: help for unix driver
  • From: Hans Berglund <hb@spacetec.no>
• Missing PWR/GND pins?
  • From: Carl Jackson <jackson@rsn.hp.com>
• ISA Spec
  • From: Brandon Frazier <brandon@bracket.com>
• status register bit 15 "detected parity error" for SERR?
  • From: Neal Palmer <neal@dinigroup.com>
• Re: PCI Windows and NT driver
  • From: "John R Pierce" <pierce@hogranch.com>
• unsubscribe
  • From: Ian Bell <instep@igs.net>
• unsubscribe
  • From: Ian Bell <instep@igs.net>
• Re: PCI Windows and NT driver
  • From: "John R Pierce" <pierce@hogranch.com>
• help for unix driver
  • From: zhao xikai <xkzhao@dns.au.tsinghua.edu.cn>
• subscribe
  • From: Martin Czamai <Martin_Czamai@peak-service.com>
• PCI Windows and NT driver
  • From: "K Kibria" <kkibria@iss-us.com>
• RE: Altera Target Abort "undocumented feature" or "bug"?
  • From: Ali Najafi - Azfin <alinajafi@hqexchg.aztech.com.sg>
• _/_/FREE: Rapid Fire Mail Server+Stealth Mass Mailer_/_/
  • From: T@hk.super.net
• Embedded Single Board Computer card comes with unique ‘Peripherals Library’
  • From: Alexander Didebulidze <alex@compulab.co.il>
• COMPULAB INTRODUCES A NEW SERIES OF EMBEDDED SBC CARDS WITH PCI AND ETHERNET
  • From: Alexander Didebulidze <alex@compulab.co.il>
• Re: what is put in Vendor ID and Device ID?
  • From: "Monish Shah" <monish@poboxes.com>
• Re: CPCI 6U Max Wattage
  • From: Alan Deikman <Alan.Deikman@znyx.com>
• RE: CPCI 6U Max Wattage
  • From: Brooks Lame <Brooks_Lame@mcg.mot.com>
• about 21554 bridge
  • From: sun zhi-gang <zgsun@nudt.edu.cn>
• re: about 21554 bridge
  • From: Alan Deikman <Alan.Deikman@znyx.com>
• RE: who drives RST signal in PCI?
  • From: Andrew Ingraham <Andrew.Ingraham@digital.com>
• Memory Write Invalidate performance gains?
  • From: Neal Palmer <neal@dinigroup.com>
• subscribe
  • From: "Man H. Tam" <mtam@mictron.com>