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- Single Chip PCI HDLC Controller
- From: Bob Huebner <BOBHU@Attachmate.com>
- RE: Auxiliary power support
- From: Eric Rehm <eric@equator.com>
- Re: Host bridge config (Galileo)
- From: Mitch Kahn <mitch@demoworks.com>
- bare backplane avail?
- From: John.Lipsius@Eng.Sun.COM (John Lipsius)
- PC system memory and PCI masters
- From: fink@post.tau.ac.il (Udi Finkelstein)
- PCI Vendor and Device List
- From: "Jim Boemler" <boemler@VNET.IBM.COM>
- AMCC 5933 help needed
- From: "Mark D. Schilling" <mdschi@most.fw.hac.com>
- Re: Vendor ID
- From: Alan Simmonds <alans@primary-image.com>
- BUSMODE# logic and DEC 21152
- From: homann@erv.ericsson.se (Magnus Homann)
- RE: Host Bridge BIOS configuration (or lack of!)
- From: Pierre-Yves Santerre <pierreys@MICROSOFT.com>
- Re: Host Bridge BIOS configuration (or lack of!)
- From: "David O'Shea" <daveo@corollary.com>
- RE: Vendor ID
- From: "Kimmery, Clifford (FL51)" <kimmery@space.honeywell.com>
- Vendor ID
- From: Wilson Leung <wilsonl@cs.sfu.ca>
- Vendor ID
- From: Wilson Leung <wilsonl@cs.sfu.ca>
- Host Bridge BIOS configuration (or lack of!)
- From: Paul Slade <pauls@primary-image.com>
- PME# enabled motherboards?
- From: Alan Yee <alany@Aureal.com>
- FW: BIOS Behavior Under PCI 2.1 Spec.
- From: Mike Flora <mikefl@MICROSOFT.com>
- Target Initial Latency: How to count clocks?
- From: pavel.peleska@oen.siemens.de
- Re: USB Device Controller
- From: "Uwe Huebner" <uh@msc-ge.com>
- Undeliverable Message
- Re: contact for SILICON INTEGRATED SYSTEM (vendorID = 1039)
- From: "John R Pierce" <pierce@hogranch.com>
- contact for SILICON INTEGRATED SYSTEM (vendorID = 1039)
- From: Peter Johnston <peterj@microsoft.com>
- Unidentified subject!
- From: clauder@callisto.eicon.com (Claude Robitaille)
- USB Device Controller
- From: "Tony Murray" <tony_murray@hotmail.com>
- 3.3V system
- From: clauder@callisto.eicon.com (Claude Robitaille)
- Bus Arbiter from PLD
- From: "HERDAN, EDIE NR:4124" <herdane@pc.littongcs.com>
- Question about PCI
- From: Pablo AGHEMO <paghemo@ctinet.com.ar>
- 3v3 signaling, noise margin and universal card.
- From: basset@csti.fr (Thierry Basset)
- Orion vs Natoma
- From: Rob Barris <rbarris@quicksilver.com>
- Re: FW: HOT Plug and Expansion ROMs
- From: "Gregory R. Hill" <gregh@FirmWorks.COM>
- Chip Conflict ?
- re: <none>
- From: dvideo@ix.netcom.com (Jerry M. Robinson)
- RE: PPro chip sets
- From: bsugar@ambex-boulder.com (Bob Sugar)
- re: <none>
- From: YVazir@corp.adaptec.com
- PPro chip sets
- From: Herve Suquet <herve.suquet@ocegr.fr>
- Re: BIOS Behavior Under PCI 2.1 Spec.
- From: Berg Ingvar <ingvar.berg@team.icl.se> (Tel +46-13-31 7887)
- Re: Claiming 1M when using 8K
- From: "Monish Shah" <monish@hpfcmss.fc.hp.com>
- Re: Claiming 1M when using 8K
- From: Alan Deikman <alan@znyx.com>
- RE: Claiming 1M when using 8K
- From: "B. P. Lame" <blame@prolog.com>
- Re: Claiming 1M when using 8K
- From: "David O'Shea" <daveo@corollary.com>
- Claiming 1M when using 8K
- From: Bob Huebner <BOBHU@Attachmate.com>
- BIOS Behavior Under PCI 2.1 Spec.
- From: YVazir@corp.adaptec.com
- Re: 64MB MUCH slower then 32 or 40MB Ram (all windows 95 incarnations)
- From: "Bernd Lehahn" <Bernd@egosoft.com>
- RE: Present Signals
- From: Jeff Dahlin <JDahlin@appiantech.com>
- PCI slave single board computers
- From: "David Kemper" <davidk@voicenet.com>
- Re: Address decoding
- From: "Monish Shah" <monish@hpfcmss.fc.hp.com>
- Present Signals
- From: Jeff Dahlin <JDahlin@appiantech.com>
- Address decoding
- From: Mr Steve Joures <sjoures@saiman.demon.co.uk>
- re: <none>
- From: YVazir@corp.adaptec.com
- Request/Grant Tuning
- From: pavel.peleska@oen.siemens.de
- Auxiliary power support
- From: ball@prodsys.com (Tad Ball)
- RE: PICMG
- From: "Dunlap, Randy" <rdunlap@hayes.com>
- Re: FW: HOT Plug and Expansion ROMs
- From: willemd@ca.newbridge.com (Willem De Lind)
- Re: FW: HOT Plug and Expansion ROMs
- From: "Monish Shah" <monish@hpfcmss.fc.hp.com>
- Re: FW: HOT Plug and Expansion ROMs
- From: Rich Van Gaasbeck <richv@hpingll.cup.hp.com>
- RE: FW: HOT Plug and Expansion ROMs
- From: Tony Goodfellow <tonygd@earthlink.net>
- FW: YMMV - Sustained transfer rates on Intel 430VX motherboard
- From: "Rosenthal, Hanan" <Hanan_Rosenthal@cisnc.canon.com>
- Re: FW: HOT Plug and Expansion ROMs
- From: "Monish Shah" <monish@hpfcmss.fc.hp.com>
- Re: FW: HOT Plug and Expansion ROMs
- From: "Gregory R. Hill" <gregh@FirmWorks.COM>
- Re: YMMV - Sustained transfer rates on Intel 430VX motherboard
- From: "Bender, Bernhard" <br@elsa.de>
- YMMV - Sustained transfer rates on Intel 430VX motherboard
- From: bsugar@ambex-boulder.com (Bob Sugar)
- PCI to PCI Dec Bridge specification
- From: Guy Bonneau <guy.bonneau@Matrox.COM>
- Re: FW: HOT Plug and Expansion ROMs
- From: "Monish Shah" <monish@hpfcmss.fc.hp.com>
- PICMG
- From: Noam Efrati <noam@genie.terra.co.il>
- PM7375 behind a 21050
- From: Michel AUBERT <Michel.Aubert@itmi.cgs.fr>
- Question: Noise margin in 3V3 signaling ?
- From: basset@csti.fr (Thierry Basset)
- FW: HOT Plug and Expansion ROMs
- From: Tony Goodfellow <tonygd@earthlink.net>
- FW: video behind a bridge
- From: Jeff Dahlin <JDahlin@appiantech.com>
- Re: How 'fast' can you issue PCI BIOS calls?
- From: "David O'Shea" <daveo@corollary.com>
- Re: How 'fast' can you issue PCI BIOS calls?
- From: Dave New <den@aisinc.com>
- Attn: Microsoft. WDM (Win32 Driver Model) Level 3 -- how do I get it ?
- From: Erik Gustav <erik_gustav@rocketmail.com>
- video behind a bridge
- From: Cobra <edc@kaiwan.com>
- Re: Vary PCI clock
- From: Isaac Livny <iml@mtm3.mt.lucent.com>
- Re: Bounce from 5V to 3.3V signal switching
- From: Andy Ingraham <ingraham@wrksys.ENET.dec.com>
- WDM (Win32 Driver Model) Level 3 -- how do I get it ?
- From: Jorn Ludwig <jorn_lugwig@rocketmail.com>
- Universal Adapters
- From: Irv Negrin <IDN@nms.com>
- Bounce from 5V to 3.3V sign
- From: "Tom Wilson" <tom_wilson@qmail.newbridge.com>
- Re: PCI DMA controller
- From: "David O'Shea" <daveo@corollary.com>
- Market Information
- From: Anton Rudorfer <ru@softing.com>
- Re: 'Old PPB' and 3.3.V signaling compatibility
- From: Simon Cameron <Simon.Cameron@vsl.com.au>
- Re: PCI DMA controller
- From: "David O'Shea" <daveo@corollary.com>
- 'Old PPB' and 3.3.V signaling compatibility
- From: vch@cetia.fr (Vincent CHUFFART)
- PCI DMA controller
- From: Brad and Renea Ree <rbree@mindspring.com>
- Re: invalid byte enables
- From: "David O'Shea" <daveo@corollary.com>
- Re: Floating 64bit extension signals on a parked bus
- From: Andy Ingraham <ingraham@wrksys.ENET.dec.com>
- Floating 64bit extension signals on a parked bus
- From: "Thomas R. Hotchkiss" <tomh@giga-net.com>
- Re: REQ# deassertion
- From: Scott RoLanD <shr@s3.com>
- REQ# deassertion
- From: shr@s3.com (Scott RoLanD)
- invalid byte enables
- From: Eddie Chan <echan@fmi.fujitsu.com>
- FW: Hot Swap
- From: Jeff Dahlin <JDahlin@appiantech.com>
- Unidentified subject!
- From: Tony Rook <rook@bbt.com>
- A Config question
- From: Jim Holeman <holeman@austx.tandem.com>
- PCI Hot-Plug Specification
- From: Warren Questo <Warren_Questo@ccm.fm.intel.com>
- Re: Latency timer
- From: "David O'Shea" <daveo@corollary.com>
- PCI cards w/ LOCK support
- From: Cheryl A Kiyama <Cheryl_A_Kiyama@ccm.fm.intel.com>
- Latency timer
- From: Rafi Boneh <rafib@gilat.com>
- Re: 64 bit systems
- From: Andy Ingraham <ingraham@wrksys.ENET.dec.com>
- Re: 64 bit systems
- From: "chefren" <chefren@pi.net>
- re: BIOS POST, nested bridges and PhoenixBIOS
- From: <frances_cohen@phoenix.com> (Frances Cohen)
- Re: BIOS POST, nested bridges and PhoenixBIOS
- From: Stephen Williams <steve@icarus.icarus.com>
- Latency Timer.
- From: Rafi Boneh <RAFIB@GILAT.MHS.CompuServe.COM>
- 64 bit systems
- From: Royce Stanton <royces@flash.net>
- BIOS POST, nested bridges and PhoenixBIOS
- From: Stephen Williams <steve@icarus.icarus.com>
- Subscribe
- Re: 64-bit bus
- From: v_chau@emulex.com (Vi Chau)
- 64-bit bus
- From: larry@RNS.COM (Larry Gerald)
- pci models
- From: larry@RNS.COM (Larry Gerald)
- Re: +12v/-12v pins
- From: Ivor Bowden <ivor@peritek.com>
- +12v/-12v pins
- From: jferrerp@dsy-srv3.cern.ch (Ferrer Prieto Jorge)
- PCI Arbiter Chips
- From: "David O'Shea" <daveo@corollary.com>
- PCI DMA under Windows NT
- From: jones%photon@cti-pet.com (Bill Jones)
- Re: PCI connectors
- From: Andy Ingraham <ingraham@wrksys.ENET.dec.com>
- PCI connectors
- From: acompagnoni <acompagnoni@ibm.net>
- RE: BIST
- From: "David O'Shea" <daveo@corollary.com>
- RE: BIST
- From: Eric Rehm <eric@equator.com>
- Re: PCI PM wakeup from D3 Cold
- From: Gary Solomon <Gary_Solomon@ccm.jf.intel.com>
- UK PCI Extender cards?
- From: Alan Simmonds <alans@primary-image.com>
- thanx...
- From: "Jasper Balraj" <jasper@utopia.hclt.com>
- PCI DMA Transfert under Windows NT
- From: JEAN.J.L.LEROUX@TCETBS1.thomson.fr
- Excellent series of articles on CompactPCI in EETimes
- From: Alan Deikman <alan@znyx.com>
- i960RP and programming flash
- From: Stephen Williams <steve@icarus.icarus.com>
- Re: Windows-NT PCI driver examples (PLX-9060)
- From: Geoffrey Hickey <ghickey@cyclone.com>
- PCI and memory
- From: roybier alexandre <aroybier@sun.cpe.fr>
- Re: Looking for an ARCNET-PCI device
- From: "Meindert Kuipers" <Kuipers@connect.nl>
- Windows-NT PCI driver examples (PLX-9060)
- From: "chefren" <chefren@pi.net>
- RE: BIST
- From: "Kimmery, Clifford (FL51)" <kimmery@space.honeywell.com>
- Re: BIST
- From: "David O'Shea" <daveo@corollary.com>
- BIST
- From: "Kimmery, Clifford (FL51)" <kimmery@space.honeywell.com>
- Looking for an ARCNET-PCI device
- From: "Bob Ferrara DTN:264-3094" <ferrara@adissw.ENET.dec.com>
- Re: PCI PM wakeup from D3 Cold
- From: Gary Solomon <Gary_Solomon@ccm.jf.intel.com>
- Re: PCI PM wakeup from D3 Cold
- From: Gary Solomon <Gary_Solomon@ccm.jf.intel.com>
- Cypress PCI chipset
- From: jdharmawan@hns.com (johannes dharmawan)
- Re: PCI PM polarity of PMCSR bit
- From: Gary Solomon <Gary_Solomon@ccm.jf.intel.com>
- DMS-physical address problem
- From: Andreas Heiner <Andreas.Heiner@fr.bosch.de>
- PCI CLK CONSTRAINTS
- From: "JAMES MURRAY" <james_murray@SpectrumSignal.com>
- re: PCI PM polarity of PMCSR bit
- From: Brian Belmont <a0192894@decmail.itg.ti.com>
- re: PCI PM polarity of PMCSR bit
- From: Brian Belmont <a0192894@decmail.itg.ti.com>
- Re: PCI PM polarity of PMCSR bit
- From: Gary Solomon <Gary_Solomon@ccm.jf.intel.com>
- PCI PM polarity of PMCSR bit
- From: pontius@west.smc.com (Mark Pontius x4805)
- PCI PM wakeup from D3 Cold
- From: pontius@west.smc.com (Mark Pontius x4805)
- Re: DMA with PCI
- From: Dave New <den@aisinc.com>
- WINDOWS WAVE FILES
- From: Orlando Hernandez <hernande@asic.sc.ti.com>
- DMA with PCI
- From: roybier alexandre <aroybier@sun.cpe.fr>
- windows programming with VC++ and assembly...
- From: "Jasper Balraj" <jasper@utopia.hclt.com>
- PC Card FAQ
- From: cary@agora.rdrop.com (David Cary)
- re: Power Management spec. question
- From: Brian Belmont <a0192894@decmail.itg.ti.com>
- Fwd: Processor moves audio from ISA to PCI bus
- From: "chefren" <chefren@pi.net>
- on-chip RAM PCI device
- From: Noam Efrati <noam@genie.terra.co.il>
- Is i960RP non-compliant with PCI 2.1?
- From: bsugar@ambex-boulder.com (Bob Sugar)
- PCI Config Ed - Thanks!
- From: CSimpson@corp.adaptec.com
- Config space editor for NT?
- From: CSimpson@corp.adaptec.com
- Power Management spec. question
- From: raw@brahms.amd.com (Robert Williams)
- PCI bus stimulus/analyzer product query
- From: phil.hallmark@analog.com (Phil Hallmark)
- Texas Instruments C80 to PCI interface
- From: "Peter Ackermans" <peter.ackermans@nicolet.nl>
- Universal PCI spec, WHERE..?
- From: "Yehuda D. Yizraeli" <yehuda@chipx.co.il>
- PCI rev 1.0
- From: Tony Thomas <sn338236@ntuvax.ntu.ac.sg>
- Re: 3.3V bypassing and bussing
- From: ross@teraflop.com (Ross Harvey)
- 3.3V bypassing and bussing
- From: Ivor Bowden <ivor@peritek.com>
- PCI Prefetchable Memory
- From: Eric Rehm <eric@equator.com>
- Verifying PCI64, Virtual Chips?
- From: Rex Hill <rex@arl.wustl.edu>
- RE: Approaches for PCI Overvoltage design using 3.3volt technology
- From: Andy Ingraham 25-Feb-1997 0753 <ingraham@wrksys.ENET.dec.com>
- RE: Approaches for PCI Overvoltage design using 3.3volt technology
- From: Lars Stjernestam <rlylast@rly.abb.se>
- RE: Approaches for PCI Overvoltage design using 3.3volt technology
- From: homann@erv.ericsson.se (Magnus Homann)
- RE: Approaches for PCI Overvoltage design using 3.3volt technology
- From: Ben Andresen <andresen@asic.sc.ti.com>
- Re: Approaches for PCI Overvoltage design using 3.3volt technology
- From: Andy Ingraham <ingraham@wrksys.ENET.dec.com>
- RE: Approaches for PCI Overvoltage design using 3.3volt technology
- From: Alan Yee <alany@Aureal.com>
- Re: Approaches for PCI Overvoltage design using 3.3volt technology
- From: Andy Ingraham <ingraham@wrksys.ENET.dec.com>
- Re: Approaches for PCI Overvoltage design using 3.3volt technology
- From: ross@teraflop.com (Ross Harvey)
- Re: Approaches for PCI Overvoltage design using 3.3volt technology
- From: ross@teraflop.com (Ross Harvey)
- Approaches for PCI Overvoltage design using 3.3volt technology
- From: Alan Yee <alany@Aureal.com>
- PLX9060 / Write-Write deadlock
- From: Markus Leberecht <leberech@informatik.tu-muenchen.de>
- Rev 2.0 /2.1 State Machines
- From: Tony Goodfellow <tonygd@earthlink.net>
- Re: TRDY# Hang...
- From: Tom Keaveny <tak@core.rose.hp.com>
- Power Management Spec
- From: Warren Questo <Warren_Questo@ccm.fm.intel.com>
- Accessing PCI memory above 1MEG
- From: John Moore <JohnMo@Attachmate.com>
- Re: TRDY# Hang...
- From: Ali Najafi <alinajafi@simei.aztech.com.sg>
- What does Assert LDEV0# for VL in Award ROM Bios PCI setup m
- From: "jim busse" <jim_busse@email.award.com>
- Thanks...
- From: Clayton Cameron <ccameron@TimeStep.com>
- Re: TRDY# Hang...
- From: Alan Deikman <alan@znyx.com>
- What does Assert LDEVO# for VL in Award ROM Bios PCI setup mean ?
- From: Mark Roslawski <markros@dynamem.com>
- compact pci to isa adapters
- From: "john t. anderson" <jps@elnet.com>
- Right Angle PCI connectors
- From: alton@znyx.com (Alton Wong)
- Re: 960RP in adapter cards -Reply -Reply
- From: Irv Negrin <IDN@nms.com>
- TRDY# Hang...
- From: "monji jabori" <Monji=Jabori%Prj=Eng%PCPD=Hou@bangate.compaq.com>
- Looking for PCI-based "PC on a card" that will operate in a PC
- From: rwalter@auspex.com (Richard Walter)
- Re: 960RP in adapter cards -Reply
- From: "John R Pierce" <pierce@hogranch.com>
- 960RP in adapter cards -Reply
- From: Irv Negrin <IDN@nms.com>
- Compact PCI Chassis
- From: "Frank Seeker-P27089" <Frank_Seeker-P27089@email.mot.com>
- Right Angle PCI connectors
- From: Clayton Cameron <ccameron@TimeStep.com>
- CompactPCI Chassis
- From: "Frank Seeker-P27089" <Frank_Seeker-P27089@email.mot.com>
- 960RP in adapter cards
- Unidentified subject!
- From: Tom Kojima <kojima@valise.com>
- PCI power management
- From: "Gelder, Dimitri van" <DGelder@tulip.nl>
- 3.3V - when?
- From: Charles Curley ETW <ccurley@dwarf.fc.hp.com>
- 3.3V - when?
- From: Alan Simmonds <alans@primary-image.com>
- Re: Industrial Grade of PCI Matchmaker Chip
- From: Anton Rudorfer <ru@softing.com>
- Re: PCI Bridge support and the i960RP
- From: shr@s3.com (Scott RoLanD)
- pci testability
- From: bbrokaw@su102s.ess.harris.com (Brian Brokaw)
- Re: win nt server with 8+ PCI slots
- From: Dave New <den@aisinc.com>
- win nt server with 8+ PCI slots
- From: praveen@comit.com (Praveen G Shekokar)
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