Mail Index
[Prev Page][Next Page]
- Unidentified subject!
- From: Rajkamal Gill <rgill@eleceng.ucl.ac.uk>
- Please explain rule 1 of Target Termination Signaling rules
- Re: HP's proposal for PCI specification modification
- From: Alan Deikman <alan@znyx.com>
- phantom IRQs?
- From: rdunlap@atlanta.nsc.com (Randy Dunlap)
- Re: (Fwd) Re: 66 MHz Capability bit in AGP
- From: png@woof.net (Peter N. Glaskowsky)
- (Fwd) Re: 66 MHz Capability bit in AGP
- From: "Monish Shah" <monish@hpfcmss.fc.hp.com>
- DPMI spec
- From: Noam Efrati <noam@genie.terra.co.il>
- Re: 66 MHz Capability bit in AGP
- From: png@woof.net (Peter N. Glaskowsky)
- RE: Private Devices and OS support
- From: Pierre-Yves Santerre <pierreys@MICROSOFT.com>
- [fcorella@gslxsrv2.rose.hp.com: address aliasing]
- From: Francisco Corella <fcorella@gslxsrv2.rose.hp.com>
- Re: Version 2.1 changes
- From: frank.story@tempe.vlsi.com
- Private Devices and OS support
- From: "Vogt" <vogt@inet.dpt.com>
- Re: 66 MHz Capability bit in AGP
- From: "Monish Shah" <monish@hpfcmss.fc.hp.com>
- Re: ISA to PCI conversion
- From: Chris Yates <cly@radstone.co.uk>
- Re: PMC Standard
- From: Chris Yates <cly@radstone.co.uk>
- Re: 66 MHz Capability bit in AGP
- From: png@woof.net (Peter N. Glaskowsky)
- please add me to list
- From: Patrick Harkin - ADC <pharkin@adc.cirrus.com>
- MS View on multifunctions
- From: Pierre-Yves Santerre <pierreys@MICROSOFT.com>
- PMC Standard
- From: alton@znyx.com (Alton Wong)
- Re: Multifunction Graphics Adapters
- From: "John R Pierce" <pierce@scruznet.com>
- Re: 66 MHz Capability bit in AGP
- From: ajoy@rendition.com (Ajoy Aswadhati)
- Re: PMC Standard
- From: Levinson Lorne <fhlevins@wicc.weizmann.ac.il>
- Re: Multifunction Graphics Adapters
- From: sas@corp.cirrus.com (Stephen A. Smith)
- Re: Multifunction Graphics Adapters
- From: "Bender, Bernhard" <br@elsa.de>
- PCI Bus Advice for 3D Chip wanted
- From: "Christopher J. Kitrick" <chrisk@diamondmm.com>
- PCI exclusive access question
- From: Steven Frechette <stevenf@hw.stratus.com>
- PMC Standard
- From: Pavel.Peleska@mch.scn.de
- ISA to PCI conversion
- From: "Suresh S" <ssuresh@utopia.hclt.com>
- 66 MHz Capability bit in AGP
- From: havard@brooktree.com (havard scott)
- Re: How to get PCI vendor code ?
- From: ivor@peritek.com (Ivor Bowden)
- Multifunction Graphics Adapters
- From: "Rudy DTN 223-5334 M.S. PKO3-1/N40" <stalzer@wrksys.ENET.dec.com>
- How to get PCI vendor code ?
- From: "Uli Krumrey" <ukrumrey@iat.ch>
- VGA/SVGA Core
- From: Eric Rehm <eric@equator.com>
- Re: proposal to fix ordering problem in PCI 2.1
- From: "McDonald, Ed" <mcd@msgate.ColumbiaSC.NCR.COM>
- Alan Deikman's solution
- From: Francisco Corella <fcorella@gslxsrv2.rose.hp.com>
- PCI Audio
- From: Andrew Crosland <crosland@radstone.co.uk>
- Re: proposal to fix ordering problem in PCI 2.1
- From: Alan Deikman <alan@znyx.com>
- Re: using XMS function 0bh - move EMB
- From: "John R Pierce" <pierce@scruznet.com>
- Re: proposal to fix ordering problem in PCI 2.1
- From: "McDonald, Ed" <mcd@msgate.ColumbiaSC.NCR.COM>
- using XMS function 0bh - move EMB
- From: Noam Efrati <noam@genie.terra.co.il>
- PCI-Arbiter Extension
- From: neumayk@kontron.de (Karl Neumayer)
- Ordering problem---response to comments
- From: Francisco Corella <fcorella@gslxsrv2.rose.hp.com>
- Re: proposal to fix ordering problem in PCI 2.1
- From: dvj@apple.com (David V. James)
- Re: proposal to fix ordering problem in PCI 2.1
- From: David B Gustavson <dbg@SCIzzL.com>
- PCMCIA drivers
- From: Braun_Josef#Tel3805 <bj3805@denbgm31m.scnn1.msmgate.m30x.nbg.scn.de>
- seeking PCI HyperChannel interface
- From: Glen Scratchley - Systems Engineering <glen@totaltec.com>
- re: Resource Conflict Problem on a PCI bus of a PC System Board
- From: frances_cohen@ptltd.com
- Re: PCI card current loads
- From: John R Pierce <pierce@scruznet.com>
- Re: vendor IDs
- From: ivor@peritek.com (Ivor Bowden)
- No Subject
- From: Christopher Weaver <cjw@3Dlabs.com>
- Re: PCI card current loads
- From: "Thomas Schutt" <Thomas_Schutt@splashtech.com>
- ATM on PMC
- From: Lorne J Levinson <fhlevins@wicc.weizmann.ac.il>
- ATM on PMC
- From: olsonc@master.tds-az.lmco.com (Chris Olson)
- Re: proposal to fix ordering problem in PCI 2.1
- From: kevin.normoyle@Eng.Sun.COM (Kevin Normoyle)
- Resource Conflict Problem on a PCI bus of a PC System Board
- From: "Rosenthal, Hanan" <Hanan_Rosenthal@cisnc.canon.com>
- Re: proposal to fix ordering problem in PCI 2.1
- From: png@woof.net (Peter N. Glaskowsky)
- Re: PCI card current loads
- From: png@woof.net (Peter N. Glaskowsky)
- proposal to fix ordering problem in PCI 2.1
- From: Francisco Corella <fcorella@gslxsrv2.rose.hp.com>
- CompactPCI Chassis
- From: "Frank L. Setinsek" <FLS@altatech.com>
- Political postings to this group
- From: Alan Deikman <alan@znyx.com>
- Re: PCI card current loads
- From: "Thomas Schutt" <Thomas_Schutt@splashtech.com>
- Re: Proposition 211. The Initiative That Would Kill Silicon
- From: Frank_Gruendel@ccl.lhag.de (Frank Gruendel)
- Re: PCI DMA
- From: John R Pierce <pierce@scruznet.com>
- Proposition 211. The Initiative That Would Kill Silicon (fwd)
- From: michael.bender@Eng.Sun.COM (Michael Bender)
- PCI-DMA
- From: Nalan Thamma P <nalant@ncore.soft.net>
- RE: PCI-DMA
- From: Eric Rehm <eric@equator.com>
- Re: PCI-DMA
- From: frank.story@tempe.vlsi.com
- Proposition 211. The Initiative That Would Kill Silicon Valley, no more PCI
- From: tedlu@ix.netcom.com
- PCI DMA
- From: "Meindert Kuipers" <Kuipers@connect.nl>
- Re: Live PCI interface in a powered down system
- From: Jeff Carter <jeffc@world.std.com>
- Re: PCI arbiter implementation
- From: Tom Keaveny <tak@core.rose.hp.com>
- Re: PCI arbiter implementation
- From: kevin.normoyle@Eng.Sun.COM (Kevin Normoyle)
- RE: Live PCI interface in a powered down system
- From: "B. P. Lame" <blame@prolog.com>
- Re: burst reads
- From: Braun_Josef#Tel3805 <bj3805@denbgm31m.scnn1.msmgate.m30x.nbg.scn.de>
- re: PCI card current loads
- From: "Witalka, Jerome J RV" <jjw1@PO9.RV.unisys.com>
- Live PCI interface in a powered down system
- From: Chas Horvath <chas@isis.com>
- Re: Parity on Intel Advanced/ML Motherboard
- From: EricX M Landry <EricX_M_Landry@ccm.co.intel.com>
- Re: PCI arbiter implementation
- From: Mitch Kahn <mak@galileot.com>
- PCI Driver debugging using SoftIce
- From: Suguna R <suguna@aztech.com.sg>
- RE:PCI_Extenders
- From: "FuturePlus: Barbara A." <71035.3052@compuserve.com>
- HP PCI analyzer available for sub-lease
- From: "Greg Carson" <gregcar@Ancor.com>
- PCI arbiter implementation
- From: Simon Cameron <Simon.Cameron@vsl.com.au>
- Re: PCI WRITE TO XROM region
- From: "Monish Shah" <monish@hpfcmss.fc.hp.com>
- Parity on Intel Advanced/ML Motherboard
- From: "Frank Seeker-P27089" <Frank_Seeker-P27089@email.mot.com>
- PCI WRITE TO XROM region
- From: Mohamad Tisani <mo@amcc.com>
- Re: PCI card current loads
- From: Bruce Hanahan <bhanahan@ccmail.crosscomm.com>
- PCI Connectors for .090" thick motherboard?
- From: rwalter@auspex.com (Richard Walter)
- Re: PCI Retainer
- From: jdahlin@precisionimages.com
- Re: PCI Retainer
- From: ivor@peritek.com (Ivor Bowden)
- Address of PCI vendor
- From: Hamdani <hamdani@indo.net.id>
- PCI Retainer
- From: Peter Ma <ma@idacom.hp.com>
- RE: Disabling a BAR
- From: "Kimmery, Clifford (FL51)" <kimmery@space.honeywell.com>
- Re: Disabling a BAR
- From: goudreau@dg-rtp.dg.com (Bob Goudreau)
- Are you writing firmware for Power Macintosh and/or CHRP peripheral cards?
- From: "Gregory R. Hill" <gregh@FirmWorks.COM>
- PCI Pwr Mgt, HP feedbacks
- From: FRANCOIS_LOISON@HP-France-om1.om.hp.com
- RE: PCI extender
- From: Vandana Lokeshwar <vanlok@aztech.com.sg>
- PCI extender
- From: Hamdani <hamdani@indo.net.id>
- RE: PCI extender
- From: Lorne J Levinson <fhlevins@wicc.weizmann.ac.il>
- RE: Disabling a BAR
- From: "Kimmery, Clifford (FL51)" <kimmery@space.honeywell.com>
- Re: Disabling a BAR
- From: Devendra K Tripathi <tripathi@Synopsys.COM>
- Re: burst reads
- From: "John R Pierce" <pierce@scruznet.com>
- burst reads
- From: Geoffrey Brown <gbrown@anise.ee.cornell.edu>
- SDRAM and 430VX
- From: Bruce Pirger <pirger@iras3.tn.cornell.edu>
- Disabling a BAR
- From: "Kimmery, Clifford (FL51)" <kimmery@space.honeywell.com>
- New PCI I/F Chip (take 2!)
- From: Mitch Kahn <mitch@demoworks.com>
- New PCI Interface Chip
- From: Mitch Kahn <mitch@demoworks.com>
- PCI card current loads
- From: "Witalka, Jerome J RV" <jjw1@PO9.RV.unisys.com>
- Re: Write only latency timer register
- From: "Monish Shah" <monish@hpfcmss.fc.hp.com>
- Write only latency timer register
- From: "Wolfgang Friedrich" <friwol@iis.fhg.de>
- Re: Broadcasting data...
- From: Jim Ulrich <jimu@pathlight.com>
- Re: bidirectional REQ#/GNT#
- From: Andy Ingraham <ingraham@wrksys.ENET.dec.com>
- Re: Problem w/ Matrox Millenium
- From: Terry Matula <tmatula@felix.TECLink.Net>
- bidirectional REQ#/GNT#
- From: "Kimmery, Clifford (FL51)" <kimmery@space.honeywell.com>
- Re: Broadcasting data to multiple PCI agents
- From: Devendra K Tripathi <tripathi@Synopsys.COM>
- Re: Host Bridge Bandwidth Starvation
- From: "David O'Shea" <daveo@larry.corollary.com>
- Delayed Transactions
- From: brians@Aureal.com (Brian Sassone)
- arbiter fairness
- From: frank.story@tempe.vlsi.com
- Re: Problem w/ Matrox Millenium - Related question
- From: holeman@lumeria.mpd.tandem.com (Jim Holeman)
- Broadcasting data to multiple PCI agents
- From: limorp@msil.sps.mot.com (Limor Peretz)
- Re: Broadcasting data to multiple PCI agents
- From: "Monish Shah" <monish@hpfcmss.fc.hp.com>
- Re: TRITON CHIPSET, I...II...?
- From: "Guarrieri, Stephen TR" <SXG1@trpo7.tr.unisys.com>
- Re: TRITON CHIPSET, I...II...?
- From: noel.lecorre@vz.cit.alcatel.fr
- Re: TRITON CHIPSET, I...II...?
- From: "Yehuda D. Yizraeli" <yehuda@chipx.co.il>
- Re: Problem w/ Matrox Millenium
- From: "John R Pierce" <pierce@scruznet.com>
- Re: TRITON CHIPSET, I...II...?
- From: "John R Pierce" <pierce@scruznet.com>
- FREE DEMO: Write NT & 95 device drivers without kernel mode programming
- From: WinDriver Support <krf@inter.net.il>
- TRITON CHIPSET, I...II...?
- From: "Yehuda D. Yizraeli" <yehuda@chipx.co.il>
- Re: Problem w/ Matrox Millenium
- From: Tom Hicks <thicks@fore.com>
- Problem w/ Matrox Millenium
- From: brians@Aureal.com (Brian Sassone)
- Re:Are you an AGP implementor?
- From: Devendra K Tripathi <tripathi@Synopsys.COM>
- Re: [Fwd: pci - reset#]
- From: Andy Ingraham <ingraham@wrksys.ENET.dec.com>
- [Fwd: pci - reset#]
- From: Francis Zerbib <research@batm.co.il>
- FW: Are you an AGP implementor?
- From: Edge Computing <edge@halcyon.com>
- Re: Question about Interrupt Pin PCI Config. Register.
- From: michael.bender@Eng.Sun.COM (Michael Bender)
- Re: Question about Interrupt Pin PCI Config. Register.
- From: H John McGrath <H_John_McGrath@ccm.jf.intel.com>
- Re: PCI-Arbiter Extension
- From: Tom Keaveny <tak@core.rose.hp.com>
- Are you an AGP implementor?
- From: eric@scn.org (Eric Rehm)
- Question about Interrupt Pin PCI Config. Register.
- From: enstone@phx.sectel.mot.com (Mark Enstone)
- PCI-Arbiter Extension
- From: Norman J Rasmussen <Norman_J_Rasmussen@ccm.jf.intel.com>
- PCI-Arbiter Extension
- From: neumayk@kontron.de (Karl Neumayer)
- 2.0 vs 2.1 compliance
- From: Farzad Khosrowpour <farzadk@btc.adaptec.com>
- Re: PCI SCSI Expansion ROM
- From: Drew Eckhardt <drew@poohsticks.org>
- PCI SCSI Expansion ROM
- From: <w_wong@emulex.com>
- Re: ground bounce
- From: Andy Ingraham 08-Oct-1996 0920 <ingraham@wrksys.ENET.dec.com>
- RE: PCI Bus Extenders (fwd)
- From: Jason Trizna <jbt@mclean.sparta.com>
- Re[2]: PCI Bus Extenders (fwd)
- From: Richard Rooney <richard.rooney@mentec.ie>
- RE: PCI Bus Extenders (fwd)
- From: Peter Ma <ma@idacom.hp.com>
- PCI Bus Extenders
- From: Peter Ma <ma@idacom.hp.com>
- ground bounce
- From: jdharmawan@hns.com (johannes dharmawan)
- Passisve Backplane PCI Spec
- From: "B. P. Lame" <blame@prolog.com>
- SBUS 2 PCI Bridge
- From: ramana@oldnick.ross.com (Ramana V. Rachakonda)
- 64-bit PCI card
- From: chow@icarus.eng.hou.compaq.com (Raymond Chow)
- Re: 64 bit BARs
- From: Devendra K Tripathi <tripathi@Synopsys.COM>
- Re: 64 bit BARs
- From: Steve Glaser <glaser@lkg.dec.com>
- 64 bit BARs
- From: Matt Kaufman <mek@sco.COM>
- Questions about the card edge connector
- From: Steven E Rice <stever@mdhost.cse.tek.com>
- PCI product leads.
- From: DaveJones <DaveJ@ssec.wisc.edu>
- PCI 3.3 V signaling compliant PAL
- From: Pavel.Peleska@mch.scn.de
- ADD ME TO LIST
- From: Mo Tisani <mo@amcc.com>
- Re: 3v drivers on 5v busses
- From: Eric Rehm <eric@equator.com>
- Re: Re[2]: PCI Interrupts
- From: "John R Pierce" <pierce@scruznet.com>
- Re: pci - reset#
- From: Andy Ingraham <ingraham@wrksys.ENET.dec.com>
- Re: 64 bit and 66 MHz devices
- From: Ian Jamison <ianj@quadrics.com>
- Re: Re[2]: PCI Interrupts
- From: henrylau@cts.com (Henry Lau)
- Re: 64 bit and 66 MHz devices
- From: Ian Jamison <ianj@quadrics.com>
- Re: 64 bit and 66 MHz devices
- From: Ian Jamison <ianj@quadrics.com>
- pci - reset#
- From: Francis Zerbib <research@batm.co.il>
- Re: PCI DRAM Controller
- From: "Ingvar Berg" <ingvar_berg@x400.icl.co.uk>
- Re: Re[2]: PCI Interrupts
- From: "John R Pierce" <pierce@scruznet.com>
- Re[3]: Arbitration question (GNT#->FRAME# latency)
- From: Robert.Hormuth@natinst.com (Robert Hormuth)
- Re[3]: Arbitration question (GNT#->FRAME# latency)
- From: "Johnson, Ralph" <ralphj@bit3.com>
- Re: Re[2]: PCI Interrupts
- From: henrylau@cts.com (Henry Lau)
- Re: 64 bit and 66 MHz devices
- From: "John R Pierce" <pierce@scruznet.com>
- 64 bit and 66 MHz devices
- From: Bruce Hanahan <bhanahan@ccmail.crosscomm.com>
- Re: Arbitration question (GNT#->FRAME# latency)
- From: "Johnson, Ralph" <ralphj@bit3.com>
- Re: PCI Interrupts
- From: "Ingvar Berg" <ingvar_berg@x400.icl.co.uk>
- Re: PCI DRAM Controller
- From: Mitch Kahn <mitch@demoworks.com>
- CPU's on PCI expansion cards
- From: holeman@lumeria.mpd.tandem.com (Jim Holeman)
- Re: PCI Interrupts
- From: henrylau@cts.com (Henry Lau)
- Re: PCI Interrupts
- From: Tom Warren <tom.warren@tempe.vlsi.com>
- RE: Linear address mapping
- From: "Kevin D. Davis" <kevind@ti.com>
- Re: PCI DRAM Controller
- From: Mitch Kahn <mitch@demoworks.com>
- Re: Devices using VGA Palette snooping?
- From: "John R Pierce" <pierce@scruznet.com>
- Re: Devices using VGA Palette snooping?
- From: relliott@hobbit.eng.hou.compaq.com (Robert Elliott)
- RE: Linear address mapping
- From: "Kevin D. Davis" <kevind@ti.com>
- Re: Linear address mapping
- From: Stephen Williams <steve@icarus.com>
- Re: Linear address mapping
- From: Charles Curley ETW <ccurley@dwarf.fc.hp.com>
- Re: Linear address mapping
- From: "John R Pierce" <pierce@scruznet.com>
- Re: Linear address mapping
- From: "John R Pierce" <pierce@scruznet.com>
- Re: ISA Retainer bracket info requested for PCI add-on
- From: jdahlin@precisionimages.com
- Re: Linear address mapping
- From: Stephen Williams <steve@icarus.com>
- Re: Linear address mapping
- From: "chefren" <chefren@pi.net>
- Re: PCI Deadlock Handling
- From: "Johnson, Ralph" <ralphj@bit3.com>
- Thank you !
- From: Tobias Stumber <tobias.stumber@fr.bosch.de>
- Re: Linear address mapping
- From: frances_cohen@ptltd.com
- Re: Linear address mapping
- From: "John R Pierce" <pierce@scruznet.com>
- Re: Linear address mapping
- From: Tobias Stumber <tobias.stumber@fr.bosch.de>
- Re: Devices using VGA Palette snooping?
- From: "John R Pierce" <pierce@scruznet.com>
- Devices using VGA Palette snooping?
- From: relliott@hobbit.eng.hou.compaq.com (Robert Elliott)
- Tundra Ships QSpan
- From: "Ian McGill" <ian_mcgill@qmail.newbridge.com>
Mail converted by MHonArc 2.5.2