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- Re: PCI I/O Space Consumption Limitation
- From: goudreau@dg-rtp.dg.com (Bob Goudreau)
- Re: TDI and TDO signal
- From: Timothy Hellman/PicTel <Timothy_Hellman@smtpnotes.pictel.com>
- Re: Re[2]: PCI I/O Space Consumption Limitation
- From: "John R Pierce" <pierce@scruznet.com>
- FW: Re[2]: PCI I/O Space Consumption Limitation
- From: "Taylor, Mike" <mike@buntypost.dundee.ncr.com>
- FW: PCI I/O Space Consumption Limitation
- From: "Belvin Stephen E" <belvin_stephen_e@smtp2.space.honeywell.com>
- RE: Re[2]: PCI I/O Space Consumption Limitation
- From: "Belvin Stephen E" <belvin_stephen_e@smtp2.space.honeywell.com>
- Re[2]: PCI I/O Space Consumption Limitation
- From: GANESANV@american.megatrends.com (GANESANV)
- RE: PCI I/O Space Consumption Limitation
- From: "Belvin Stephen E" <belvin_stephen_e@smtp2.space.honeywell.com>
- Re: PCI I/O Space Consumption Limitation
- From: Devendra K Tripathi <tripathi@Synopsys.COM>
- PCI I/O Space Consumption Limitation
- From: "Belvin Stephen E" <belvin_stephen_e@smtp2.space.honeywell.com>
- Re: TDI and TDO signal
- From: cjclark@intellitech.com (cjclark)
- FW: Wakeup from a PCI device
- From: Ken Reneris <kenr@MICROSOFT.com>
- 3.3V Host/PCI Bridges
- From: "Lee Tim" <lee_tim@msah.cig.mot.com>
- TDI and TDO signal
- From: Carsten Bode <cb@@Diehl.DE>
- Re[2]: TDI and TDO signal
- From: Richard Rooney <richard.rooney@mentec.ie>
- Re: TDI and TDO signal
- From: "John R Pierce" <pierce@scruznet.com>
- PCI and Expansion ROM
- From: GERARD_FRASSE-MATHON@HP-France-om3.om.hp.com
- Re: Option ROM / OS Driver Questions
- From: "David O'Shea" <daveo@corollary.com>
- Re: PRSNT1 & PRSNT2 Signals on backplane
- From: Andy Ingraham <ingraham@wrksys.ENET.dec.com>
- PCI Hot-Swap
- From: Alan Deikman <alan@znyx.com>
- Option ROM / OS Driver Questions
- From: Mike Doerfler <derf@hpderf.fc.hp.com>
- Re: Wakeup via PRSNT_ Signals
- From: uo957@freenet.victoria.bc.ca (James MacPhail)
- PRSNT1 & PRSNT2 Signals on backplane
- From: Jason Trizna <jbt@mclean.sparta.com>
- Re: Adapter board 3.3V regulators
- From: "Don Abernathey" <dla@pyramid.com>
- Re: Adapter board 3.3V regulators
- From: Andy Ingraham 19-Aug-1996 1208 <ingraham@wrksys.ENET.dec.com>
- Re: Adapter board 3.3V regulators
- From: Charles Curley ETW <ccurley@dwarf.fc.hp.com>
- Re: steering the BE# ?
- From: "Monish Shah" <monish@mcsy2.fc.hp.com>
- Re: Adapter board 3.3V regulators
- From: Charles Curley ETW <ccurley@dwarf.fc.hp.com>
- Re: Info ... save this
- From: Chris Malcheski <71232.360@CompuServe.COM>
- Re: Adapter board 3.3V regulators
- From: "Randall Restle" <r.restle@ix.netcom.com>
- Re: Config area
- From: Chris Malcheski <71232.360@CompuServe.COM>
- Info ... save this
- From: Chris Malcheski <71232.360@CompuServe.COM>
- Re: Adapter board 3.3V regulators
- From: "John R Pierce" <pierce@scruznet.com>
- Adapter board 3.3V regulators
- From: "Randall Restle" <r.restle@ix.netcom.com>
- Re: Config area
- From: Chris Malcheski <71232.360@CompuServe.COM>
- Re: steering the BE# ?
- From: tw38966@is1.vub.ac.be (Rafiki Kim Hofmans)
- Re: steering the BE# ?
- From: "John R Pierce" <pierce@scruznet.com>
- steering the BE# ?
- From: tw38966@is1.bfu.vub.ac.be (Rafiki Kim Hofmans)
- Re: Wakeup from a PCI device
- From: sigma@brentwood.bc.ca (Sigma Seven Systems Ltd.)
- Config area
- From: Chris Malcheski <71232.360@CompuServe.COM>
- Re[2]: Wakeup from a PCI device
- From: Bruce Young <Bruce_Young@ccm.jf.intel.com>
- Re: Wakeup from a PCI device
- From: jmedeiro@slonet.org (Jim Medeiros)
- 3.3V Motherboards
- From: "Randall Restle" <r.restle@ix.netcom.com>
- Re: New PCI Bus Pin
- From: Bruce Young <Bruce_Young@ccm.jf.intel.com>
- Re: Wakeup from a PCI device
- From: frank.story@tempe.vlsi.com
- Re: Signoff instructions request
- From: ivor@peritek.peritek.com (Ivor Bowden)
- Re: Signoff instructions request
- From: rdunlap@atlanta.nsc.com (Randy Dunlap)
- Re: Wakeup from a PCI device
- From: klaus@efficient.com (Klaus Fosmark)
- Signoff instructions request
- From: Tom McCausland <mevman@starbase.neosoft.com>
- Re: Transaction abort
- From: Devendra K Tripathi <tripathi@Synopsys.COM>
- Re: Transaction abort
- From: "David O'Shea" <daveo@corollary.com>
- New PCI Bus Pin
- From: "Kevin D. Davis" <kevind@ti.com>
- Re: PPB ints. and IRQ routing
- From: rdunlap@atlanta.nsc.com (Randy Dunlap)
- Re: Transaction abort
- From: "John R Pierce" <pierce@scruznet.com>
- Transaction abort
- From: Rafi Boneh <RAFIB@GILAT.MHS.CompuServe.COM>
- Re: Re[2]: Wakeup from a PCI device
- From: Bruce Young <Bruce_Young@ccm.jf.intel.com>
- Re: Re[2]: Wakeup from a PCI device
- From: Charles Curley ETW <ccurley@dwarf.fc.hp.com>
- Re: Wakeup from a PCI device
- From: Bruce Young <Bruce_Young@ccm.jf.intel.com>
- Re: Wakeup from a PCI device
- From: Charles Curley ETW <ccurley@dwarf.fc.hp.com>
- Power Supply (rev B)
- From: "Johnson, Ralph" <ralphj@bit3.com>
- Re: Wakeup from a PCI device
- From: sas@corp.cirrus.com (Stephen A. Smith)
- Re: Re[2]: Wakeup from a PCI device
- From: frank.story@tempe.vlsi.com
- Re[2]: Wakeup from a PCI device
- From: Bruce Young <Bruce_Young@ccm.jf.intel.com>
- Power Supply
- From: "Johnson, Ralph" <ralphj@bit3.com>
- Re: Wakeup from a PCI device
- From: Frank Helms <frank.helms@amd.com>
- Re: Wakeup from a PCI device
- From: "David O'Shea" <daveo@corollary.com>
- Wakeup from a PCI device
- From: Bruce Young <Bruce_Young@ccm.jf.intel.com>
- PPB ints. and IRQ routing
- From: rdunlap@atlanta.nsc.com (Randy Dunlap)
- PCI Workshops
- From: "Meindert Kuipers" <Kuipers@connect.nl>
- joining pci internet forums
- Experiance with Sand Synthesizable core
- From: Pavel.Peleska@mch.scn.de
- re: PCI BAR and Expansion ROM
- From: frances_cohen@ptltd.com
- Re: PCI BAR and Expansion ROM
- From: "David O'Shea" <daveo@corollary.com>
- PCI BAR and Expansion ROM
- From: <w_wong@emulex.com>
- Re: Latency for Bridges
- From: Norman J Rasmussen <Norman_J_Rasmussen@ccm.jf.intel.com>
- Re[6]: i960RP - host downloading code
- From: Byron R Gillespie <Byron_R_Gillespie@ccm.ch.intel.com>
- Re: VDMA & PCI
- From: mcguffog@mmgnet.com (Sandy McGuffog)
- RE: VDMA & PCI
- From: ingvar.berg.swe3650@oasis.icl.co.uk
- Re: VDMA & PCI
- From: "Monish Shah" <monish@mcsy2.fc.hp.com>
- VDMA & PCI
- From: Chris Malcheski <71232.360@CompuServe.COM>
- Re: Latency for Bridges
- From: jww@anchor.eng.hou.compaq.com (Jeff Wolford)
- Re: PCI and Expansion ROM
- From: Gilbert Yeung <gilbert@lanworks.com>
- Re: PCI and Expansion ROM
- From: Gilbert Yeung <gilbert@lanworks.com>
- Test Card
- From: Charles Curley <ccurley@dwarf.fc.hp.com>
- Re: state machine 2.0:some thoughts
- From: Devendra K Tripathi <tripathi@Synopsys.COM>
- PCI PPB option ROM
- From: Dong Wei <dong@gslxsrv3.rose.hp.com>
- state machine 2.0:some thoughts
- From: Norman J Rasmussen <Norman_J_Rasmussen@ccm.jf.intel.com>
- PCI bus analysis
- From: Mike Winters <mikew@corelis.com>
- state machine 2.0:some thoughts
- From: tw38966@is1.bfu.vub.ac.be (Rafiki Kim Hofmans)
- Re: PCI and Expansion ROM
- From: mkarl@syskonnect.de (Michael Karl)
- Re[5]: i960RP - host downloading code
- From: Noam Efrati <noam@genie.terra.co.il>
- state machine 2.0:some thoughts
- From: tw38966@is1.bfu.vub.ac.be (Rafiki Kim Hofmans)
- Latency for Bridges
- From: "Belvin Stephen E" <belvin_stephen_e@smtp2.space.honeywell.com>
- Re: PCI and Expansion ROM
- From: rwalter@auspex.com (Richard Walter)
- Re: PCI and Expansion ROM
- From: Charles Curley <ccurley@dwarf.fc.hp.com>
- Re: PCI and Expansion ROM
- From: Tom Warren <tom.warren@tempe.vlsi.com>
- AIX drivers
- From: Craig Mathewson <craigm@sederta.com>
- Re: PCI and Expansion ROM
- From: rwalter@auspex.com (Richard Walter)
- PCI and Expansion ROM
- From: Michael.Bender@Eng.Sun.COM (Michael Bender)
- PCI and Expansion ROM
- From: Gilbert Yeung <gilbert@lanworks.com>
- Re[4]: i960RP - host downloading code
- From: Byron R Gillespie <Byron_R_Gillespie@ccm.ch.intel.com>
- Re: Re[3]: i960RP - host downloading code
- From: Stephen Williams <steve@icarus.com>
- Re[3]: i960RP - host downloading code
- From: Noam Efrati <noam@genie.terra.co.il>
- Re: PCI Bus Analyzers
- From: Ali Najafi <alinajafi@aztech.com.sg>
- Re: PC INT13 and the BAR
- From: "David O'Shea" <daveo@corollary.com>
- Re: PC System BIOS and Base Address Register
- From: Bruce Young <Bruce_Young@ccm.jf.intel.com>
- PC INT13 and the BAR
- From: <w_wong@emulex.com>
- Appropriate Spec. language
- From: sigma@brentwood.bc.ca (Sigma Seven Systems Ltd.)
- Re: PC System BIOS and Base Address Register
- From: goudreau@dg-rtp.dg.com (Bob Goudreau)
- Re[2]: i960RP - host downloading code
- From: Byron R Gillespie <Byron_R_Gillespie@ccm.ch.intel.com>
- Re: PCI bus analyzer and test suite
- From: ajoy@rendition.com (Ajoy Aswadhati)
- Re: PC System BIOS and Base Address Register
- From: v_chau@emulex.com (Vi Chau)
- Re: PC System BIOS and Base Address Register
- From: Bruce Young <Bruce_Young@ccm.jf.intel.com>
- Re: PC System BIOS and Base Address Register
- From: "David O'Shea" <daveo@corollary.com>
- Re: PCI bus analyzer and test suite
- From: lofgren@escmail.orl.mmc.com
- Re: PC System BIOS and Base Address Register
- From: Daniele Beccari <Daniele_Beccari@grenoble.hp.com>
- Re: i960RP - host downloading code
- From: Noam Efrati <noam@genie.terra.co.il>
- PCI bus analyzer and test suite
- From: Ali Najafi <alinajafi@aztech.com.sg>
- RE: PCI Bus Analyzers
- From: Ali Najafi <alinajafi@aztech.com.sg>
- Re: PCI & DSP56301 bus mastering.
- From: leonid@msil.sps.mot.com (Leonid Smolyansky)
- Re: PCIVIEW.EXE utility?
- From: Didier Lachieze <didierl@petunia.grenoble.hp.com>
- Re: i960RP - host downloading code
- From: Byron R Gillespie <Byron_R_Gillespie@ccm.ch.intel.com>
- PCI & DSP56301 bus mastering.
- From: mpflaga@Oakland.edu
- PCI drivers chip
- From: noamh@msil.sps.mot.com ( Noam Halevy )
- Re[2]: Termination of Bussed signals (CompactPCI)
- From: Knapp <knapp@conware.de>
- PCIVIEW.EXE utility?
- From: Matt Cross <mcross@sw.stratus.com>
- ATM 25Mbps chip for Small PCI and Card bus
- From: ksuzukih <haruji.suzuki@tokyo.ssi1.com>
- RE: Cache Line Size register
- From: ingvar_berg@x400.icl.co.uk
- Cache Line Size register
- From: Ali Najafi <alinajafi@aztech.com.sg>
- Re[2]: JTAG/Boundary Scan
- From: Richard Rooney <richard.rooney@mentec.ie>
- Fw: Regarding: rajiva@corp.cirrus.com (was: Re: base address and limit)
- From: "John R Pierce" <pierce@scruznet.com>
- Re: base address and limit
- From: "John R Pierce" <pierce@scruznet.com>
- base address and limit
- From: Noam Efrati <noam@genie.terra.co.il>
- i960RP - host downloading code
- From: Noam Efrati <noam@genie.terra.co.il>
- Re: PCI 2.0 (33MHz) support for maximum burst data transfer
- From: Bruce Young <Bruce_Young@ccm.jf.intel.com>
- PC System BIOS and Base Address Register
- From: <w_wong@emulex.com>
- PCI 2.0 (33MHz) support for maximum burst data transfer from disk drive
- From: "George Shin" <gshin@hertz.elee.calpoly.edu>
- Are you writing firmware for Power Macintosh and/or CHRP peripheral cards?
- From: gregh@FirmWorks.COM (Greg Hill)
- Distributed DMA, PC-PCI, Serialized IRQs
- From: Frank Helms <frank.helms@amd.com>
- I2O Reflector?
- From: "Guarrieri, Stephen TR" <SXG1@trpo7.tr.unisys.com>
- Re: PCI and UART
- From: leonid@msil.sps.mot.com (Leonid Smolyansky)
- Re: pci config space in sco3.0
- PCI and UART
- From: Orjan.Johansson@emw.ericsson.se (Orjan Johansson)
- Re: pci config space in sco3.0
- From: Charles Curley <ccurley@dwarf.fc.hp.com>
- xilinx vs altera
- From: tw38966@is1.bfu.vub.ac.be (Rafiki Kim Hofmans)
- Re: Termination of Bussed signals (CompactPCI)
- From: mellitz@eagle.ColumbiaSC.NCR.COM
- PCI 2 ISA controllers
- From: Cesar Penafiel <cesar@worldramp.net>
- Re: Termination of Bussed signals (CompactPCI)
- From: Andy Ingraham <ingraham@wrksys.ENET.dec.com>
- Re: Termination of Bussed signals
- From: dvideo@ix.netcom.com (Jerry M. Robinson )
- pci config space in sco3.0
- From: "Bhaskaran K." <bflbas@plutonium.bflsl.soft.net>
- Re: JTAG/Boundary Scan
- From: "Devendra K Tripathi" <tripathi@Synopsys.COM>
- Re: cache memory
- From: "Richard Walter" <rwalter@auspex.com>
- Termination of Bussed signals
- From: "Brijender Mann" <bmann2@ford.com>
- RE: Subsystem IDs, again
- From: "Kevin D. Davis" <kevind@ti.com>
- RE: Subsystem IDs, again
- From: "John R Pierce" <pierce@scruznet.com>
- RE: Subsystem IDs, again
- From: "Kevin D. Davis" <kevind@ti.com>
- Re: non-implemented commands
- From: "Monish Shah" <monish@mcsy2.fc.hp.com>
- RE: Subsystem IDs, again
- From: "Kevin D. Davis" <kevind@ti.com>
- Re: JTAG/Boundary Scan
- From: "Didier Lachieze" <didierl@petunia.grenoble.hp.com>
- Re: JTAG/Boundary Scan
- From: "Andy Ingraham" <ingraham@wrksys.ENET.dec.com>
- JTAG/Boundary Scan
- From: "Reza Vahedi" <reza@cognex.com>
- cache memory
- From: "Au Kum Chuen" <au@sol.fujikura.co.jp>
- non-implemented commands
- From: "Anand" <anandv@eecs.umich.edu>
- RE: Subsystem IDs, again
- From: "John R Pierce" <pierce@scruznet.com>
- Re: Subsystem IDs, again
- From: "Peter N. Glaskowsky" <png@woof.net>
- Byte Merging
- From: "Robert Hormuth" <Robert.Hormuth@natinst.com>
- Re: Subsystem IDs, again
- From: "Didier Lachieze" <didierl@petunia.grenoble.hp.com>
- Re: Subsystem IDs, again
- From: <ingvar_berg@x400.icl.co.uk>
- Re: IRDY# in multiple data Special cycle Transaciton
- From: "Dave New" <den@aisinc.com>
- RE: Looking for a specific application
- From: "DaveJones" <DaveJ@ssec.wisc.edu>
- Re: motherboard target burst size
- From: "Bruce Young" <Bruce_Young@ccm.jf.intel.com>
- PCI 2.1 State Machine Errors?
- From: "Rand Briggs" <rand@hpbs3330.boi.hp.com>
- PCI Bus Analysis
- From: "FuturePlus: Barbara A." <71035.3052@compuserve.com>
- Re: Purpose of VIO Lines ???
- From: "Andy Ingraham" <ingraham@wrksys.ENET.dec.com>
- Re: Is 3.3v supplied by motherboards?
- From: "Andy Ingraham" <ingraham@wrksys.ENET.dec.com>
- Re: PCI bus I/O expansion cards and/or modems
- From: "Michael Bender" <Michael.Bender@Eng.Sun.COM>
- RE: motherboard target burst size
- From: "Sam Duncan - 508.493.6794 31-Jul-1996 1316" <duncan@poboxb.ENET.dec.com>
- Re: Is 3.3v supplied by motherboards?
- From: "Tom Hicks" <thicks@fore.com>
- Purpose of VIO Lines ???
- From: "Brijender Mann" <bmann2@ford.com>
- Is 3.3v supplied by motherboards?
- From: "Carey Sasser" <sasser@hp4.nmg.sms.siemens.com>
- PCI Class Codes
- From: "Chris Yates" <cly@radstone.co.uk>
- RE: Subsystem IDs, again
- From: "Kevin D. Davis" <kevind@ti.com>
- Looking for a specific application
- From: "DaveJones" <DaveJ@ssec.wisc.edu>
- Re: PCI bus I/O expansion cards and/or modems
- From: "Jim Holeman" <holeman@lumeria.mpd.tandem.com>
- motherboard target burst size
- From: "David J. Matthews" <djm@papillonres.com>
- RE: Subsystem IDs, again
- From: <ingvar_berg@x400.icl.co.uk>
- PCI BIOS question
- From: "Thomas Dippon" <thomasd@hpbidrd.bbn.hp.com>
- PCI bus I/O expansion cards and/or modems
- From: "Bob Gaydos" <bgaydos%delta.ba.kent.edu@ba.kent.edu>
- PCI bus I/O expansion cards and/or modems
- From: "Bob Gaydos" <bgaydos%delta.ba.kent.edu@ba.kent.edu>
- Subsystem IDs, again
- From: "Peter N. Glaskowsky" <png@woof.net>
- Re: PCI pinout
- From: "Andy Ingraham" <ingraham@wrksys.ENET.dec.com>
- PCI pinout
- From: "Wilson Yee" <wilson.yee@xilinx.com>
- Re: IRDY# in multiple data Special cycle Transaciton
- From: "Shivakumar S. Chonnad" <shiv@Synopsys.COM>
- re: PCI Bus Master memory read commands
- From: "Tom Keaveny" <tak@core.rose.hp.com>
- Re: PCI Bus Master memory read commands
- From: "Monish Shah" <monish@mcsy2.fc.hp.com>
- RE: Subsystem Vendor and Device IDs
- re: PCI Bus Master memory read commands
- From: "Jim Holeman" <holeman@lumeria.mpd.tandem.com>
- Re: decreasing bus clok speed
- From: "Alex Predtechenski" <Alexei.Predtechenski@amd.com>
- Re: Accessing memory in 32-bit space
- From: "Jim Ulrich" <jimu@highlife.pathlight.com>
- RE: Subsystem Vendor and Device IDs
- From: <ingvar_berg@x400.icl.co.uk>
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