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- MSI Support, Ordering Rules
- From: "Amit Shah" <Amit@dcmtech.com>
- Memory Read Line and Memory Read Multiple
- From: jukka.alve@nokia.com
- from PCI framegrabber to PCI raid
- From: Geert Bellens <Geert.Bellens@esat.kuleuven.ac.be>
- Fw: Routing & Layout near PCI connector
- From: "Dalanco Spry" <sales@dalanco.com>
- List Removal
- From: "Mark D. Wildy" <mwildy@fusionworld.com>
- Re: from PCI framegrabber to PCI raid
- From: Rick Collins - Arius <PCImail@arius.com>
- Re: from PCI framegrabber to PCI raid
- From: Richard Walter <rwalter@corp.auspex.com>
- RE: Memory Read Line and Memory Read Multiple
- From: Praveen.Durga@dcmds.co.in
- Re: from PCI framegrabber to PCI raid
- From: Neal Palmer <neal@dinigroup.com>
- RE: Memory Read Line and Memory Read Multiple
- From: "mano, oren" <mano_oren@emc.com>
- 66Mhz 64bit motherboard
- From: Simon Lau <simon@eurekatech.com>
- Re: 66Mhz 64bit motherboard
- From: "John Birkner" <birkner@quicklogic.com>
- Re: 66Mhz 64bit motherboard
- From: Michael Richardson <mcr@solidum.com>
- need help on pci design projects
- From: "ANN WIE WONG" <wormworm@hotmail.com>
- Re: Memory Read Line and Memory Read Multiple
- From: Manfred Kuhland <man@atlantek.com.au>
- Re: need help on pci design projects
- From: "Peter Marek" <peter.marek@marekmicro.de>
- Re: 66Mhz 64bit motherboard
- From: Jean Petena <jean_petena@hp.com>
- RE: need help on pci design projects
- From: "Glen S. Rosen" <glenr@actel.com>
- RE: 66Mhz 64bit motherboard
- From: "Ingraham, Andrew" <Andrew.Ingraham@compaq.com>
- Re: 66Mhz 64bit motherboard
- From: "John Birkner" <birkner@quicklogic.com>
- RE: 66Mhz 64bit motherboard
- From: "Ingraham, Andrew" <Andrew.Ingraham@compaq.com>
- RE: 66Mhz 64bit motherboard
- From: Wen-King Su <wen-king@myri.com>
- RE: Memory Read Line and Memory Read Multiple
- From: jukka.alve@nokia.com
- My Introduction / How PPB claim configtype1 cycles
- From: Jürgen Klemt <jk@cellware.de>
- Re: My Introduction / How PPB claim configtype1 cycles
- From: "Gardiner, Charles" <charles.gardiner@mchr2.siemens.de>
- Re: My Introduction / How PPB claim configtype1 cycles
- From: Shimon Rottenberg <shimon@mellanox.co.il>
- In-rush current specification (?)
- From: "Fockler, Joe" <jfockler@ti.com>
- RE: In-rush current specification (?)
- From: "Ingraham, Andrew" <Andrew.Ingraham@compaq.com>
- RE: In-rush current specification (?)
- From: Lame Brooks-G14738 <brooks.lame@motorola.com>
- RE: In-rush current specification (?)
- From: "Fockler, Joe" <jfockler@ti.com>
- BAR Allocations
- From: Tony Goodfellow <tonyg@1pdc.com>
- Address parity on PAR64 during SAC
- From: Shimon Rottenberg <shimon@mellanox.co.il>
- Re: BAR Allocations
- From: "Peter Marek" <peter.marek@marekmicro.de>
- PCI Card Testing
- From: "Dayne Bond" <prince@dayne.fsnet.co.uk>
- RE: PCI Card Testing
- From: CJ Clark <cjclark@INTELLITECH.COM>
- PCI 2.2 question
- From: "Allen, Douglas" <Douglas_Allen@perkinelmer.com>
- RE: PCI 2.2 question
- From: "Reasoner, George E" <George.Reasoner@unisys.com>
- PCI Testing (Thanks)
- From: "Dayne Bond" <prince@dayne.fsnet.co.uk>
- Embedded PCI VGA.
- From: Marc Reviel <mreviel@powerlogix.com>
- how to control FRAME# signal ???
- From: "ANN WIE WONG" <wormworm@hotmail.com>
- cpci addressing scheme
- From: "crlbel" <crlbel@vsnl.com>
- where can i get a generic pci device driver source codes?
- From: "ANN WIE WONG" <wormworm@hotmail.com>
- RE: PCI 2.2 question
- From: Neal Palmer <neal@dinigroup.com>
- Re: PCI 2.2 question
- From: Michael Richardson <mcr@solidum.com>
- PCI/CPCI resource FAQ RE: cpci addressing scheme
- From: Lame Brooks-G14738 <brooks.lame@motorola.com> (by way of Daniel Weaver <danw@znyx.com>)
- Re: PCI 2.2 question
- From: Neal Palmer <neal@dinigroup.com>
- PCI-X Error Recovery
- From: "Faria, Dick" <Dick.Faria@compaq.com>
- PCI-X Attributes
- From: "Amit Shah" <Amit@dcmtech.com>
- Re: PCI-X Attributes
- From: "Swapnajit Mittra" <mittra@my-deja.com> (by way of Daniel Weaver <danw@znyx.com>)
- RE: PCI-X Attributes
- From: Sanjay Goyal <SanjayG@ami.com>
- what happens if 2 INTs occur at same time
- From: Jürgen Klemt <jk@cellware.de>
- RE: what happens if 2 INTs occur at same time
- From: Jürgen Klemt <jk@cellware.de>
- RE: what happens if 2 INTs occur at same time
- From: "Ingraham, Andrew" <Andrew.Ingraham@compaq.com>
- Re: what happens if 2 INTs occur at same time
- From: "Thomas J. Merritt" <tjm@codegen.com>
- No Subject
- From: RAVI CHANDRA ANANTHA <ravi_chandra25@usa.net>
- RE: what happens if 2 INTs occur at same time
- From: Jürgen Klemt <jk@cellware.de>
- Penny Stock Tip of The Week
- Memory Read/Write to Device
- From: Jens Richter <richter@nentec.de>
- How to control CDrom IDE
- From: "Horta" <nabaut@attglobal.net>
- Re: How to control CDrom IDE
- From: "Gardiner, Charles" <charles.gardiner@mchr2.siemens.de>
- Re: How to control CDrom IDE
- From: Dimiter Popoff <tgi_earth@yahoo.com>
- THE INFORMATION YOU REQUESTED -MHYS
- From: "DENNIS"<ULBNVUS@GJWJ.YAHOO.COM>
- Need an Intel/DEC EB154 PCI Bridge Evaluation kit
- From: Mike Dini <mdini@dinigroup.com>
- Investment $5 & 1hr. Returns Between $2 to $10,000 -GJOQ
- From: bribon@YOYN.mycabin.com
- PCI Arbiter
- From: Wilson Leung <wleung@arkon.bc.ca>
- Re: PCI Arbiter
- From: Simon Lau <simon@eurekatech.com>
- PCI reset on soft boot
- From: Jeff Dahlin <JDahlin@appiangraphics.com>
- RE: PCI reset on soft boot
- From: "O'Shea, David J" <david.j.oshea@intel.com>
- Re: PCI reset on soft boot
- From: "Peter Marek" <peter.marek@marekmicro.de>
- AMCC S5933 and Master Abort
- From: "Thomas Heller" <thomas.heller@ion-tof.com>
- Intel 840 Chipset PCI Bus Arbiter
- From: jjourney@us.ibm.com
- Any way to force a 64-bit transaction
- From: Michael Richardson <mcr@solidum.com>
- Re: PCI reset on soft boot
- From: Dan Mick <Dan.Mick@West.Sun.COM>
- PCI Specification
- From: PRASAD KUMAR V <vpk@myw.ltindia.com>
- Re: PCI reset on soft boot
- From: Patrick Maupin <pmaupin@jump.net>
- Re: Any way to force a 64-bit transaction
- From: Neal Palmer <neal@dinigroup.com>
- Re: Any way to force a 64-bit transaction
- From: Bob Mathews <bobm@lsil.com>
- RE: Any way to force a 64-bit transaction
- From: "O'Shea, David J" <david.j.oshea@intel.com>
- RE: AMCC S5933 and Master Abort
- From: Lame Brooks-G14738 <brooks.lame@motorola.com>
- RE: AMCC S5933 and Master Abort
- From: Tom Warren <twarren@nvidia.com>
- RE: AMCC S5933 and Master Abort
- From: "Allen, Douglas" <Douglas_Allen@perkinelmer.com>
- RE: AMCC S5933 and Master Abort
- From: Neal Palmer <neal@dinigroup.com>
- PCI Power Management Specification
- ILOVEYOU
- From: ccameron@newbridge.com
- VIRUS ALERT previous mail
- From: Geert Bellens <Geert.Bellens@esat.kuleuven.ac.be>
- WARNING. You sent a potential virus or unauthorised code
- From: virus@virus.messagelabs.com
- WARNING. Someone sent you a potential virus or unauthorised code
- From: virus@virus.messagelabs.com
- Fwd: VIRUS ALERT previous mail
- From: Alan Deikman <Alan.Deikman@znyx.com>
- PCI system integration issues
- From: Ben Yurick <byurick@keithley.com>
- RE: PCI system integration issues
- From: "Brian Small" <small@quicklogic.com>
- RE: VIRUS ALERT previous mail
- From: "Jim Boemler" <boemler@vnet.ibm.com>
- Power Management Interface Design
- From: "Narayan kulshrestha" <narayan.pci@eudoramail.com>
- Re: PCI system integration issues
- From: "Peter Marek" <peter.marek@marekmicro.de>
- Antigen found VBS/LoveLetter.A@mm.Worm virus
- From: ANTIGEN_NDS-IL-EX1 <ANTIGEN_NDS-IL-EX1@ext-ex.ndc.co.il>
- Antigen found VBS/LoveLetter.A@mm.Worm virus
- From: ANTIGEN_NDS-IL-EX4 <ANTIGEN_NDS-IL-EX4@ext-ex.ndc.co.il>
- Lock Transactions !!
- From: "Amit Shah" <Amit@dcmtech.com>
- Q:PMC Host CPU ?
- From: "Thomas Ebert" <te@wiese.de>
- Address Map question
- From: fmnemeth@collins.rockwell.com
- RE: Address Map question
- From: Lame Brooks-G14738 <brooks.lame@motorola.com>
- Thank you for your e-mail!!
- From: <tony@teamglobe.com>
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