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Subsystem Vendor ID
From
: "Hayrettin B. Karayaka" <karayaka.1@osu.edu>
Re: Subsystem Vendor ID
From
: Lloyd Bircher <nicad2@yahoo.com>
Re: Subsystem Vendor ID
From
: "Weng" <wtx@umem.com>
Re: Subsystem Vendor ID
From
: "Mikhail Matusov" <matusov@squarepeg.ca>
Fw: Subsystem Vendor ID
From
: "Weng" <wtx@umem.com>
RE: Subsystem Vendor ID
From
: "James Lam(SC)" <james.lam@o2micro.com>
Re: Subsystem Vendor ID
From
: "Mikhail Matusov" <matusov@squarepeg.ca>
mini-pci
From
: Greg Carraway <hrcinfo@yahoo.com>
Re: Subsystem Vendor ID
From
: "Hayrettin B. Karayaka" <karayaka.1@osu.edu>
Re: Subsystem Vendor ID
From
: "Mikhail Matusov" <matusov@squarepeg.ca>
Re: Subsystem Vendor ID
From
: Rick Collins <arius@erols.com>
Mini PCI Type III connector
From
: slava <slava@smlink.com>
Subsystem Vendor ID
From
: "Hayrettin B. Karayaka" <karayaka.1@osu.edu>
Re: PCI compatible microcontroller
From
: Klaus Bahner <kgb@tcelectronic.dk>
Hot-swap and Reset Trhfa
From
: Lame Brooks-G14738 <brooks.lame@motorola.com>
Connector for PCI
From
: Mahler Willi <Willi.Mahler@icn.siemens.de>
Latency Timer Register Implementation
From
: RAVI CHANDRA ANANTHA <ravi_chandra25@usa.net>
PCI 2.2 compliant PADs
From
: Raan Kahn <raan@ngcable.com>
Re: Latency Timer Register Implementation
From
: Lloyd Bircher <nicad2@yahoo.com>
PCI chip help.
From
: Viswanath K <Viswanath.Krishnamurthy@eng.sun.com>
Clock design / spread spectrum question
From
: Klaus Bahner <kgb@tcelectronic.dk>
Intel 21152BA bridge (new stepping)
From
: Danny Pierini <danny.pierini@matrox.com>
RE: Clock design / spread spectrum question
From
: "Ingraham, Andrew" <Andrew.Ingraham@compaq.com>
two loads on a single connector ?
From
: "Muzaffer Kal" <muzaffer@kal.st> (by way of Daniel Weaver <danw@znyx.com>)
No Subject
From
: dahlin@wa.freei.net
RE: two loads on a single connector ?
From
: "Ingraham, Andrew" <Andrew.Ingraham@compaq.com>
two loads on a single connector ?
From
: fmnemeth@collins.rockwell.com
Re: two loads on a single connector ?
From
: Neal Palmer <neal@dinigroup.com>
Innovative GSM Solutions
From
: David Prenes <dprenes@3wood.com>
RE: two loads on a single connector ?
From
: Jeff Dahlin <JDahlin@appiangraphics.com>
General purpose PCI 66/64 Bridge Chip
From
: Andrew <andrewstone@ozemail.com.au>
Join the No-Brainer Club today! $$$$$$
From
: 7WqQJrbU6@asahi-net.or.jp
mini-pci to pci adapter
From
: "Peekay Chan" <peekay@synopsys.com>
RE: mini-pci to pci adapter
From
: "W. J. Gomes III" <jgomes@integrated-dsp.com>
Life styles of the soon to be rich?
From
: opie@money.2ndmail.com
RE: PCI-to-PCI Bridge
From
: "W. J. Gomes III" <jgomes@integrated-dsp.com>
RE: mini-pci to pci adapter
From
: Shuka Zernovizky <ShukaZ@m-sys.com>
MLT value and PCI2PCI bridge
From
: Peter.Heumann@Abg1.SIEMENS.DE
RE: PCI-to-PCI Bridge
From
: "Tisani, Mohamad" <MTisani@pericom.com>
PCI device id and vendor id list
From
: "Shebayev, Eugene" <eshebaye@rbcds.com>
Re: PCI device id and vendor id list
From
: "Thomas J. Merritt" <tjm@codegen.com>
Tired of working to make someone else WEALTHY?
From
: katie72@urgentmail.com
pci9080 chip
From
: "Harkema, G.A." <G.A.Harkema@tue.nl>
Re: pci9080 chip
From
: "Masaru Naganuma" <naganuma@edec.co.jp>
MLT value and PCI2PCI bridge
From
: Peter.Heumann@Abg1.SIEMENS.DE
cPCI target
From
: Michael_Kharkover@amat.com
RE: MLT value and PCI2PCI bridge
From
: Lame Brooks-G14738 <brooks.lame@motorola.com>
RE: pci9080 chip
From
: Gord Wait <Gord_Wait@spectrumsignal.com>
RE: cPCI target
From
: Cadez Borut RDHW <b.cadez@iskratel.si>
PAR64 location
From
: Ronnen Lovinger <ronnen@mellanox.co.il>
Re: pci9080 chip
From
: Stephan Gick <gck@iis.fhg.de>
Generic PCI 64 or 66MHz interface chip availability?
From
: Austin Franklin <austin@darkroom.com>
Subtractive on DAC?
From
: Tom Jones <tjones@sebringnetworks.com>
New in USA!...NON-SURGICAL LIPOSUCTION with guaranteed overnight results!
From
: hghjghjg_ghfrghfgh@bigfoot.com
PCI compliance for tristate output buffers
From
: Albert.Lo@flextronicssemi.com
PCI compliance for tristate output buffers
From
: masahiko_fukao@notes.takaoka.co.jp
PCI PCB Specification
From
: Mike Jones <Mike.Jones@renishaw.com>
PCI PCB Specification
From
: Mike Jones <Mike.Jones@renishaw.com>
Can a PCI Slave generate INTA# ?
From
: "Ram Y. Gopal" <ramgo@vEngines.com>
RE: Can a PCI Slave generate INTA# ?
From
: "Holt, Patrick" <pholt@mc.com>
Re: Can a PCI Slave generate INTA# ?
From
: "Weng Tianxiang" <wtx@umem.com>
Re: PCI PCB Specification
From
: Ivor Bowden <ivor@peritek.com>
Re: PCI PCB Specification
From
: Neal Palmer <neal@dinigroup.com>
Re: PCI PCB Specification
From
: Richard Walter <rwalter@Brocade.COM>
Re: PCI PCB Specification
From
: Mike Keenly <mkeenly@alteon.com>
RE: PCI PCB Specification
From
: Jim Sather <jsather@sbs.com>
clarification on DWORD
From
: Mario da Costa <mario@controlnet.co.in>
Drivers PCI for CPV3060 & CPV5350
From
: Christophe.LINDHEIMER@tcc.thomson-csf.com
RE: Drivers PCI for CPV3060 & CPV5350
From
: Lame Brooks-G14738 <brooks.lame@motorola.com>
Message Signaled Interrupts
From
: "J. J. Farrell" <jjf@hal.com>
Get PCI routing information.
From
: "Andy Vercauteren" <Andy.Vercauteren@egemin.be>
Re: Get PCI routing information.
From
: Ivor Bowden <ivor@peritek.com>
Re: Get PCI routing information.
From
: Lloyd Bircher <nicad2@yahoo.com>
PCI-X bus loading
From
: hudiono@cmd.com
<= 8 byte operations, with 64-bit PCI master
From
: Kevin Normoyle <Kevin.Normoyle@Eng.Sun.COM>
Re: <= 8 byte operations, with 64-bit PCI master
From
: "Monish Shah" <monishs_in@yahoo.com>
PCI Card "HALT" Testing
From
: Daniel Weaver <dan.weaver@znyx.com>
PCI-to-PCI bridge
From
: C V Sesha Sai Kumar <cvseshu@synopsys.com>
Re: Message Signaled Interrupts
From
: Michael Richardson <mcr@sandelman.ottawa.on.ca>
Parity - impications of not implementing this
From
: "Daniel DeConinck" <daniel.deconinck@sympatico.ca>
C/BE[3:0] - PCI traget implementation
From
: "Daniel DeConinck" <daniel.deconinck@sympatico.ca>
Re: PCI-to-PCI bridge
From
: "J. J. Farrell" <jjf@hal.com>
Re: Parity - impications of not implementing this
From
: "Monish Shah" <monishs_in@yahoo.com>
Re: C/BE[3:0] - PCI traget implementation
From
: Marco Brambilla <marco-tpa.brambilla@st.com>
Re: C/BE[3:0] - PCI traget implementation
From
: "Peter Marek" <peter.marek@marekmicro.de>
Re: Parity - impications of not implementing this
From
: Daniel Weaver <dan.weaver@znyx.com>
PCI compliance for tristate output buffers
From
: Albert.Lo@flextronicssemi.com
PCI compliance for tristate output buffers
From
: masahiko_fukao@notes.takaoka.co.jp
PCI compliance for tristate output buffers
From
: masahiko_fukao@notes.takaoka.co.jp
Any operating systems support VPD yet?
From
: Neal Palmer <neal@dinigroup.com>
PCI-PCI bridge hot swap
From
: Jim Stevens <jim.stevens@computerboards.com>
PCI core logic for Target needed.
From
: "Daniel DeConinck" <daniel.deconinck@sympatico.ca>
Fw: PCI-PCI bridge hot swap
From
: "Mark Santoro" <santoro@mindspring.com>
Re: PCI core logic for Target needed.
From
: Dimiter Popoff <tgi_earth@yahoo.com>
Memory Write and Invalidate
From
: Duane Clark <dclark@akamail.com>
Write Combining difference between 98 and NT
From
: "Paul Slade" <Paul@pmis.freeserve.co.uk>
remove me from list
From
: "Sabareeshwaran" <sabree@controlnet.co.in>
PCI core logic for Target needed.
From
: Uwe Kirst <kirst@dvs.de>
RE: Write Combining difference between 98 and NT
From
: Dave New <NewD@esi.com>
PCI Bracket Dimensions
From
: Al Keyworth <Al.Keyworth@computerboards.com>
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