Mail Index

• Thread Index

• RE: PCI core logic for Target needed.
  • From: austin@darkroom.com
• Re: Write Combining difference between 98 and NT
  • From: "Paul Slade" <Paul@pmis.freeserve.co.uk>
• Re: PCI core logic for Target needed.
  • From: "Weng Tianxiang" <wtx@umem.com>
• Re: Memory Write and Invalidate
  • From: Neal Palmer <neal@dinigroup.com>
• Re: Write Combining difference between 98 and NT
  • From: "Paul Slade" <Paul@pmis.freeserve.co.uk>
• RE: Memory Write and Invalidate
  • From: "Tisani, Mohamad" <MTisani@pericom.com>
• RE: Write Combining difference between 98 and NT
  • From: Dave New <NewD@esi.com>
• 64 bit PCI video cards?
  • From: Austin Franklin <austin@darkroom.com>
• target burst accesses - resending
  • From: Vijay Chougule <vchougule@altavista.com>
• Re: target burst accesses - resending
  • From: Duane Clark <dclark@akamail.com>
• Offtopic - Interviews and non-disclosure agreements
  • From: Rick Collins - Arius <PCImail@arius.com>
• Re: target burst accesses - resending
  • From: "Monish Shah" <monishs_in@yahoo.com>
• RE: Offtopic - Interviews and non-disclosure agreements
  • From: Dave New <NewD@esi.com>
• Re: target burst accesses - resending
  • From: Frank Story <frank.story@acoustictech.com>
• Memory Configuration Space
  • From: Jens Richter <richter@nentec.de>
• Fwd: Offtopic - Interviews and non-disclosure agreements
  • From: Alan Deikman <Alan.Deikman@znyx.com>
• Fw: target burst accesses - resending
  • From: "Weng Tianxiang" <wtx@umem.com>
• RE: Offtopic - Interviews and non-disclosure agreements
  • From: "Jim Boemler" <boemler@vnet.ibm.com>
• Re: Memory Configuration Space
  • From: Gene Morgan <morgan@equator.com>
• Re: Offtopic - Interviews and non-disclosure agreements
  • From: Steven Larky <spl@cypress.com>
• Re: Memory Configuration Space
  • From: "Peter Marek" <peter.marek@marekmicro.de>
• Re: Memory Configuration Space
  • From: Jens Richter <richter@nentec.de>
• remove
  • From: ljf <ljfww@cs.hn.cn>
• looking for PCI clock driver
  • From: Stuart Adams <sja@brightstareng.com>
• Re: looking for PCI clock driver
  • From: Jose Franciso Toledo Alarcon <Jose.Toledo@cern.ch>
• Re: looking for PCI clock driver
  • From: "Richard Cotton" <rcotton@globalnet.co.uk>
• RE: PCI Clock drivers
  • From: "Peter Marek" <peter.marek@marekmicro.de>
• MIN_GNT, MAX_LAT and class code effect on PCI master performance
  • From: Graeme Gill <graeme@colorbus.com.au>
• Help on PCI versions
  • From: ROBBO <robbo@dfi.com.tw>
• Address Stepping
  • From: Gene Morgan <morgan@equator.com>
• RE: Address Stepping
  • From: Tony Clark <Tony.Clark@mn.efi.com>
• looking for Parity signal status
  • From: nimit.endlay@st.com
• Re: looking for Parity signal status
  • From: "Peter Marek" <peter.marek@marekmicro.de>
• RE: looking for Parity signal status
  • From: Richard Walter <rwalter@Brocade.COM>
• Re: looking for Parity signal status
  • From: Kevin Normoyle <Kevin.Normoyle@Eng.Sun.COM>
• Intel chipsets and prefetch during PCI target read
  • From: "William F Hong" <wfhong@west.raytheon.com>
• Apologies -- Some network downtime
  • From: Alan Deikman <Alan.Deikman@znyx.com>
• RE: Intel chipsets and prefetch during PCI target read
  • From: Lame Brooks-G14738 <brooks.lame@motorola.com>
• Data Parity Error Recovery
  • From: "Madhura Bokil" <madhura@controlnet.co.in>
• Wanted to Buy|Lease: HP E2928A
  • From: Tom Jones <tjones@sebringnetworks.com>
• Re: Intel chipsets and prefetch during PCI target read
  • From: Carter Buck <CBuck@PLXTech.com>
• Interfacing PCI devices to AGP bus
  • From: "Kline, Mark" <MKline@crossbeamsys.com>
• Questions about PCI
  • From: "Jim Chan" <tan264@hotmail.com>
• Pointers to cPCI: Enet-Switch/NEBS compliant power supplys
  • From: Peleska Pavel <Pavel.Peleska@icn.siemens.de>
• RE: Questions about PCI
  • From: Richard Walter <rwalter@Brocade.COM>
• RE: Wanted to Buy|Lease: HP E2928A
  • From: Tom Jones <tjones@sebringnetworks.com>
• Re: Questions about PCI
  • From: Ivor Bowden <ivor@peritek.com>
• RE: Wanted to Buy|Lease: HP E2928A
  • From: Austin Franklin <austin@darkroom.com>
• 5V vs. 3.3V signaling
  • From: Alex Horvath <ahorvath@cisco.com>
• Re: 5V vs. 3.3V signaling
  • From: Ivor Bowden <ivor@peritek.com>
• Re: 5V vs. 3.3V signaling
  • From: Neal Palmer <neal@dinigroup.com>
• RE: 5V vs. 3.3V signaling
  • From: "John Bloomfield" <john@datacube.com>
• Is it a PCI specs violation that ...
  • From: "Weng Tianxiang" <wtx@umem.com>
• RE: Is it a PCI specs violation that ...
  • From: Richard Walter <rwalter@Brocade.COM>
• pci-x query
  • From: "Madhura Bokil" <madhura@controlnet.co.in>
• Re: pci-x query
  • From: iachetta@us.ibm.com
• Re: pci-x query
  • From: "Amit Shah" <Amit@dcmtech.com>
• Re: pci-x query
  • From: Lloyd Bircher <nicad2@yahoo.com>
• Multiple Memory Windows for RISC Host Bridges
  • From: Paresh Patel <paresh@slscorp.com>
• Can anyone spare 31 AMCC 5920's?
  • From: Mike Dini <mdini@dinigroup.com>
• PCI SM Bus ECR
  • From: "Reen Presnell" <rpresnell@vtm-inc.com>
• Data Parity Error Recovery
  • From: "Madhura Bokil" <madhura@controlnet.co.in>
• Where to buy PCI-PCI bridge add-in cards?
  • From: Al Chou <AChou@SysLabs.com>
• RE: Where to buy PCI-PCI bridge add-in cards?
  • From: "Olaf Birkeland" <Olaf_Birkeland@hotmail.com>
• PCB Routing Guideline for PCI
  • From: Conor Foley <Conor.Foley@tellabs.com> (by way of Daniel Weaver <dan.weaver@znyx.com>)
• pci-x chip survey
  • From: "Cary Snyder" <cdsnyder@earthlink.net>
• Re: Where to buy PCI-PCI bridge add-in cards? <PCI Bridge Evaluation and Test Boards>
  • From: "Cary Snyder" <cdsnyder@earthlink.net>
• Re: Latest PCI Specifications and Documentations
  • From: Daniel Weaver <dan.weaver@znyx.com>
• ADV - 10 MILLION ADDRESSES CHEAP!
  • From: reach10million@epostd.com
• Search for generic PCI Master/Slave VHDL/Verilog Model
  • From: "John D. Cappello" <jcappello@optimal-design.com>
• Is there a host bridge retry counter in the chipset and what is the count limit ?
  • From: William Wu <wwu@sebringnetworks.com>
• RE: Multiple Memory Windows for RISC Host Bridges
  • From: Lame Brooks-G14738 <brooks.lame@motorola.com>
• Question about the initialization of configuration registers
  • From: "ÀÌõ¼ö" <LECOS@orgio.net>
• RE: Is there a host bridge retry counter in the chipset and what is the count limit ?
  • From: "Olaf Birkeland" <Olaf_Birkeland@hotmail.com>
• Re: Question about the initialization of configuration registers
  • From: "Stefan Spaeth, tel. +49 711.821.43051, fax 45571" <S.Spaeth@alcatel.de>
• Re: Question about the initialization of configuration registers
  • From: iachetta@us.ibm.com
• PCI Burst Length Limit
  • From: olivier.stehlin@wifag.ch
• Re: PCI Burst Length Limit
  • From: Neal Palmer <neal@dinigroup.com>
• RE: PCI Burst Length Limit
  • From: Lame Brooks-G14738 <brooks.lame@motorola.com>
• Re: PCI Burst Length Limit
  • From: "Mikhail Matusov" <matusov@squarepeg.ca>
• Latency timer questions
  • From: Vijay Chougule <vchougule@yahoo.com>
• PCI configuration transaction
  • From: "Jim Chan" <tan264@hotmail.com>
• Re: Latency timer questions
  • From: "Peter Marek" <peter.marek@marekmicro.de>
• PCI Burst Length Limit (clarification)
  • From: olivier.stehlin@wifag.ch
• Re: PCI Burst Length Limit (clarification)
  • From: "Weng Tianxiang" <wtx@umem.com>
• FFs for GNT and REQ
  • From: Zipper Thomas <Thomas.Zipper@icn.siemens.de>
• Re: FFs for GNT and REQ
  • From: "Stefan Spaeth, tel. +49 711.821.43051, fax 45571" <S.Spaeth@alcatel.de>
• RE: PCI configuration transaction
  • From: Jeff Dahlin <JDahlin@appiangraphics.com>
• Re: FFs for GNT and REQ
  • From: "Weng Tianxiang" <wtx@umem.com>
• Re: Latency timer questions
  • From: iachetta@us.ibm.com
• Re: FFs for GNT and REQ
  • From: iachetta@us.ibm.com
• Re: FFs for GNT and REQ
  • From: iachetta@us.ibm.com
• RE: FFs for GNT and REQ
  • From: Richard Walter <rwalter@Brocade.COM>
• Re: FFs for GNT and REQ
  • From: "Weng Tianxiang" <wtx@umem.com>
• RE: FFs for GNT and REQ
  • From: "Kimmery, Clifford (FL51)" <clifford.kimmery@honeywell.com>
• Re: PCI Burst Length Limit
  • From: "Sushil S.Kamerkar SO/C" <kamerkar@magnum.barc.ernet.in>
• Re: PCI Burst Length Limit
  • From: "S.Murali Krishna" <sayam@virtualipgroup.com>
• Awesome Online Marketing System - Complete Details Below
  • From: Michelle4012110@worldnet.att.net
• Question about PCI 2.2 spec and 3.3V signaling
  • From: Eric_Drozdov@alliedtelesyn.com (Eric Drozdov)
• RE: Question about PCI 2.2 spec and 3.3V signaling
  • From: "Ingraham, Andrew" <Andrew.Ingraham@compaq.com>