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- Re: Motherbards with 64 bit/66 MHz PCI slots
- From: Robert Lindsell <robertl@research.canon.com.au>
- Re: New to forum!
- From: Lucien Murray-Pitts <lucien@tardis.ed.ac.uk> (by way of Daniel Weaver <dan.weaver@znyx.com>)
- Re: Motherbards with 64 bit/66 MHz PCI slots
- From: "John Birkner" <birkner@quicklogic.com>
- Incorrect Target Termination?
- From: bs844@freenet.carleton.ca (Konstantin Neskovic)
- Re: Incorrect Target Termination?
- From: "Weng" <wtx@umem.com>
- Incorrect Target Termination?
- From: bs844@freenet.carleton.ca (Konstantin Neskovic)
- Question on DAC
- From: James Murray <jmurray@triscend.com>
- Re: Incorrect Target Termination?
- From: Gérard Roudier <groudier@club-internet.fr>
- Re: Question on DAC
- From: "Weng" <wtx@umem.com>
- PMC BUSMODE[2..0]
- From: Ivor Bowden <ivor@peritek.com>
- host cycle
- From: Philex_Lin@novatek.com.tw
- RE: Read Speed
- From: "Olaf Birkeland" <Olaf.Birkeland@fast.no>
- PMC BUSMODE[2..0]
- From: Ivor Bowden <ivor@peritek.com>
- RE: Read Speed
- From: Richard Walter <rwalter@brocade.com>
- RE: PMC BUSMODE[2..0]
- From: Lame Brooks-G14738 <Brooks_Lame-G14738@email.mot.com>
- RE: Read Speed
- From: "Olaf Birkeland" <olaf.birkeland@fast.no>
- PCI-IDE Bridge/Controller Chips
- From: "John Weil" <ra8636@email.sps.mot.com>
- PCI 64-bit master
- From: Tejendra Joshi <tejendraarunjoshi@yahoo.com>
- Re: PCI-IDE Bridge/Controller Chips
- From: "Frank Story" <frank.story@acoustictech.com>
- RE: PCI 64-bit master
- From: Richard Walter <rwalter@brocade.com>
- Companies that sell PCI-X Test Environment
- From: "Srividya Viswanathan" <srividya.viswanathan@idt.com>
- Re: PCI 64-bit master
- From: "Weng" <wtx@umem.com>
- PCI-X 1.0 Specifications on Memory BARs
- From: "Muthrasanallur, Sridhar" <sridhar.muthrasanallur@intel.com>
- motherboards 654bit 66Mhz / and not with serverworks chipset
- From: "Naert, Hans" <hans.naert@barco.com>
- Bridge throughput problems at 64bit/66Mhz
- From: Christer Olsson <Christer.Olsson@emw.ericsson.se>
- RE: Bridge throughput problems at 64bit/66Mhz
- From: "Calle, Jaime" <JC121128@exchange.SanDiegoCA.NCR.COM>
- How to handle a requirement for dual PCI FPGA configuration serial bitstreams.
- From: "Jeffrey Journey" <jjourney@us.ibm.com>
- RE: PCI clock jitter
- From: "Ingraham, Andrew" <Andrew.Ingraham@compaq.com>
- Re: How to handle a requirement for dual PCI FPGA configuration serial bit streams.
- From: Eric Crabill <crabill@xilinx.com> (by way of Daniel Weaver <dan.weaver@znyx.com>)
- pci design guide
- From: "VENKATESHWARLU V" <vv@myw.ltindia.com> (by way of Daniel Weaver <dan.weaver@znyx.com>)
- Compaq PCI-X Verilog core
- From: Brent Barr <b.barr@f5.com>
- Membership for specific companies
- Query regarding Eq's of Master State Machine
- From: s-mallikarjuna.rao@st.com
- Re: Query regarding Eq's of Master State Machine
- From: "Weng Tianxiang" <WTX@umem.com>
- Fwd: RE: 32 bit / 3.3V PCI slots?
- From: Donald Connolly <Donald.Connolly@matrox.com>
- Any suggestions?
- From: Elie Issa <carlo_9@yahoo.com>
- PCI Serial Card
- From: Marc Reviel <marc@powerlogix.com>
- RE: 32 bit / 3.3V PCI slots?
- From: "Ingraham, Andrew" <Andrew.Ingraham@compaq.com>
- 32 bit PCI, Byte Lanes
- From: "Xavi Neuri" <xcano@neuricam.com>
- Re: 32 bit PCI, Byte Lanes
- From: "Richard Iachetta" <iachetta@us.ibm.com>
- Parallel Card
- From: Giovanni Brandi <gbrandi@fashion.it>
- Compaq PCI-X Verilog core
- From: Brent Barr <b.barr@f5.com>
- PCI slot lost on power up?
- From: Ivor Bowden <ivor@peritek.com>
- RE: PCI slot lost on power up?
- From: Ivor Bowden <ivor@peritek.com>
- Re: Compaq PCI-X Verilog core
- From: Amit Shah <amits@agere.com>
- RE: Compaq PCI-X Verilog core
- From: Brent Barr <b.barr@f5.com>
- Re: Compaq PCI-X Verilog core
- From: Amit Shah <amits@agere.com>
- RE: Compaq PCI-X Verilog core
- From: Brent Barr <b.barr@f5.com>
- BIOS support for multiple host-PCI bridges on the same PCI bus
- From: neelay.das@philips.com
- RE: PCI slot lost on power up?
- From: Kuipers Meindert-G18421 <meindert.kuipers@motorola.com>
- 32 bit PCI, BAR -> FIFO.
- From: "Xavi Neuri" <xcano@neuricam.com>
- RE: PCI slot lost on power up?
- From: Ivor Bowden <ivor@peritek.com>
- RE: PCI slot lost on power up?
- From: "Ingraham, Andrew" <Andrew.Ingraham@compaq.com>
- Re: PCI slot lost on power up?
- From: Norbert Pieth <nop@first.gmd.de>
- Where is standalone PCI arbiter chip?
- From: lecos@samsung.co.kr
- help on PCI physical size
- From: Jennet Shi <zh_shi@yahoo.com>
- How to generate 64-bit transfer?
- From: Taliaferro Smith <TollyS@Lewiz.com>
- Re: How to generate 64-bit transfer?
- From: "Prateek Sharma" <prateeks@us.ibm.com>
- PCI-X
- From: Michael_Kharkover@amat.com
- No Subject
- From: "armen artoonians" <armen@mail.dci.co.ir>
- pci bus connector
- From: "Victor Piron" <victor@r2000.com>
- RE: PCI-X
- From: KC Chang <kc.chang@tundra.com> (by way of Daniel Weaver <dan.weaver@znyx.com>)
- Null Data Phases
- From: Bert Marston <bert@quadic.com>
- Unknown Vendor ID
- From: Alan Shu <Shua@esi.com>
- Re: Null Data Phases
- From: Neal Palmer <neal@dinigroup.com>
- PCI-X Bus loading in Pf
- From: Brent Barr <b.barr@f5.com>
- RE: PCI-X Bus loading in Pf
- From: Brent Barr <b.barr@f5.com>
- RE: PCI-X Bus loading in Pf
- From: "Ingraham, Andrew" <Andrew.Ingraham@compaq.com>
- RE: PCI-X Bus loading in Pf
- From: "Ingraham, Andrew" <Andrew.Ingraham@compaq.com>
- Re: pci tutorial
- From: tony@burched.com.au (burched - tony burch)
- Re: pci tutorial
- From: "Nalan Thamma" <nalan.thamma@amd.com>
- RE: pci tutorial
- From: "Ingraham, Andrew" <Andrew.Ingraham@compaq.com>
- Endian Mapping
- From: Amit Shah <amits@agere.com>
- Re: Endian Mapping
- From: Dimiter Popoff <tgi_earth@yahoo.com>
- 25MHz PCI Interface
- From: "Weng Tianxiang" <WTX@umem.com>
- Re: Endian Mapping
- From: Neal Palmer <neal@dinigroup.com>
- RE: 25MHz PCI Interface
- From: "Ingraham, Andrew" <Andrew.Ingraham@compaq.com>
- Re: Endian Mapping
- From: Manfred Kuhland <man@atlantek.com.au>
- Re: 25MHz PCI Interface
- From: "George Cosens" <cosens@linsys.ca>
- FW: Endian Mapping
- From: "John Bush" <john_b@bvmltd.co.uk>
- Re: Endian Mapping
- From: "Richard Iachetta" <iachetta@us.ibm.com>
- Re: Endian Mapping
- From: "Weng Tianxiang" <WTX@umem.com>
- No Subject
- Re: Endian Mapping
- From: "Richard Iachetta" <iachetta@us.ibm.com>
- RE: Endian Mapping
- From: Richard Walter <rwalter@brocade.com>
- WG: Maximum load of PCI-BUS
- From: "Becker, Karsten" <kbe@msc-ge.com>
- RE: Maximum load of PCI-BUS
- From: "Ingraham, Andrew" <Andrew.Ingraham@compaq.com>
- Re: Maximum load of PCI-BUS
- From: Simon Lau <simon@eurekatech.com>
- max write completion time
- From: Sanjay Cartic <scartic@ixiacom.com>
- RE: 25MHz PCI Interface
- From: "Olaf Birkeland" <Olaf.Birkeland@fast.no>
- pci trace impedance
- From: "Hofmans, Kim" <kim.hofmans@barco.com>
- pci master retry timeout value
- From: Sanjay Cartic <scartic@ixiacom.com>
- VHDL Model For PLX ?
- From: "Thomas Ebert" <te@wiese.de>
- Re: VHDL Model For PLX ?
- From: Carter Buck <CBuck@PLXTech.com>
- unsuscribe
- From: "Graziella COMISSO" <gcomisso@midisystem.fr>
- RE: PCI2.2 Master Transaction Claiming
- From: Richard Walter <rwalter@brocade.com>
- PCI2.2 Master Transaction Claiming
- From: Bert Marston <bert@quadic.com>
- Re: PCI2.2 Master Transaction Claiming
- From: "Richard Iachetta" <iachetta@us.ibm.com>
- RE: PCI2.2 Master Transaction Claiming
- From: Barry Davis <BDavis@nvidia.com>
- Re: PCI2.2 Master Transaction Claiming
- From: "Schneider, Dave" <Dave.Schneider@emulex.com>
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