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- Re: deriving 3.3V from 5V ..
- From: Mark van Nobelen <Mark.van.Nobelen@chess.nl>
- AW: deriving 3.3V from 5V ..
- From: "Preissner, Joachim" <joachim.preissner@actel.com>
- Re: deriving 3.3V from 5V ..
- From: "Marco Serafini - QR s.r.l" <r&d@qrverona.it>
- Re: deriving 3.3V from 5V ..
- From: "Peter Marek" <peter.marek@marekmicro.de>
- Re: Microstrip line for PCI clock !!?
- From: "Peter Marek" <peter.marek@marekmicro.de>
- Re: deriving 3.3V from 5V ..
- From: Andrew Ircha <api@art-render.com>
- Re: Microstrip line for PCI clock !!?
- From: "Ingraham, Andrew" <Andrew.Ingraham@compaq.com>
- RE: Microstrip line for PCI clock !!?
- From: JohanHZ@Sycron-IT.com
- PCI-X Attribute Phase Reserved Bits
- From: Espen Bøch <espen@vmetro.no>
- Re: Problem with "Universal" PCI & PCI-X support: VIO
- From: "Ingraham, Andrew" <Andrew.Ingraham@compaq.com>
- Re: Microstrip line for PCI clock !!?
- From: "Ingraham, Andrew" <Andrew.Ingraham@compaq.com>
- Bridges and BIOS code
- From: "Bill Blyth" <bb@alphadata.co.uk>
- Re: Microstrip line for PCI clock !!?
- Transaction ordering - reads flushing writes
- From: r55017@email.sps.mot.com (Ryan Mcdaniel)
- how to enable expansion rom in foxfire II test card
- From: "Cheng, Laura" <laura.cheng@intel.com>
- ground perforations in two-layer boards
- From: "Anthony Moulds" <anthony@cs.york.ac.uk>
- RE: ground perforations in two-layer boards
- From: Jim Fisher <JFisher@icsmedical.com>
- RE: Transaction ordering - reads flushing writes
- From: "Weng Tianxiang" <WTX@umem.com>
- Re: Transaction ordering - reads flushing writes
- From: "Richard Iachetta" <iachetta@us.ibm.com>
- [Fwd: ground perforations in two-layer boards]
- From: Andrew Ircha <api@art-render.com>
- RE: ground perforations in two-layer boards
- From: john.billingsley@amd.com
- Re: ground perforations in two-layer boards
- From: "Daniel DeConinck" <daniel.deconinck@sympatico.ca>
- FW: [Fwd: ground perforations in two-layer boards]
- From: Jim Fisher <JFisher@icsmedical.com>
- Re: FW: [Fwd: ground perforations in two-layer boards]
- From: jvenious@acromag.com
- RE: ground perforations in two-layer boards
- From: "Mike Coward" <mikec@ccpu.com>
- +5V going away?
- From: Bill Steinhoff <steinhof@agfa.com>
- Split completion for configuration read
- From: Noam Bloch <noam@mellanox.co.il>
- Re: Split completion for configuration read
- From: David Duxstad <dux@ieee.org>
- RE: Split completion for configuration read
- From: Richard Walter <rwalter@brocade.com>
- 3.3V Power on PCI 2.1 motherboards
- From: Eric_Drozdov@alliedtelesyn.com
- Re: 3.3V Power on PCI 2.1 motherboards
- From: Andrew Ircha <api@art-render.com>
- PCI brackets
- From: Mark van Nobelen <Mark.van.Nobelen@chess.nl>
- Re: PCI brackets
- From: "Daniel DeConinck" <daniel.deconinck@sympatico.ca>
- Re: 3.3V Power on PCI 2.1 motherboards
- From: "Ingraham, Andrew" <Andrew.Ingraham@compaq.com>
- remove
- From: Vinay Kumar <vinay@ndrgw.ndr.co.jp>
- remove
- From: "zhangjun" <zhjun@sd.mech.tohoku.ac.jp>
- nowadays 3.3V components and universal board
- From: "Marco Serafini - QR s.r.l" <r&d@qrverona.it>
- Good news on subject of PCI Straddle Mount connectors!
- From: Mike Dini <mdini@dinigroup.com>
- problem with REQ# signal
- From: dinesh@cosystems.com
- Re: problem with REQ# signal
- From: lecos@samsung.co.kr
- Information request
- From: "Paseshnichenko, MariaX" <mariax.paseshnichenko@intel.com>
- Re: Information request
- From: "Ingraham, Andrew" <Andrew.Ingraham@compaq.com>
- query
- From: "venkat v" <venky_lt@rediffmail.com>
- RE: query
- From: "Weng Tianxiang" <WTX@umem.com>
- RE: query
- From: Richard Walter <rwalter@brocade.com>
- NMI/parity error
- From: "Mikhail Matusov" <matusov@squarepeg.ca>
- Re: NMI/parity error
- From: Carter Buck <CBuck@PLXTech.com>
- Re: NMI/parity error
- From: "Mikhail Matusov" <matusov@squarepeg.ca>
- 64-bit/66 MHz problem
- From: "venkat v" <venky_lt@rediffmail.com>
- question about pmc card
- From: "MTD Hu JianFeng" <HuJF@sbell.com.cn>
- Re: NMI/parity error
- From: "Peter Marek" <peter.marek@marekmicro.de>
- pci bus errors
- From: hemshankar tripathi <hemtripathi@yahoo.com>
- Re pci bus errors
- From: "venky" <venky_lt@rediffmail.com>
- basic doubt
- From: vechaprasad@yahoo.com
- Re: question about pmc card
- From: Ivor Bowden <ivor@peritek.com>
- test
- From: "prabhu" <ujmik96@yahoo.com>
- mapping to memory space
- From: tlyungha@rockwellcollins.com
- Ignore ...please
- From: "mikju" <ujmik96@yahoo.com>
- Remove
- From: "Mark Brown" <mark@quicklogic.com>
- PCI Bus bridge to a laptop
- From: Jim Fisher <JFisher@icsmedical.com>
- RE: PCI Bus bridge to a laptop
- From: "Bertrand Van Kempen" <bvankempen@merging.com>
- Can non-prefetchable memory reads/writes be combined by bridges?
- From: Alan Hall <alan@databuzz.co.uk>
- PCI to ABMA bridge
- From: Jitendra Puri <jitendra@dcmtech.co.in>
- Re: PCI to ABMA bridge
- From: Simon Lau <simon@eurekatech.com>
- Driving the AD bus when signaling split response
- From: Noam Bloch <noam@mellanox.co.il>
- Backwards compatibilty of PCI-X?
- From: Bill Steinhoff <steinhof@agfa.com>
- Re: Can non-prefetchable memory reads/writes be combined by bridges?
- From: Marco Brambilla <marco-tpa.brambilla@st.com>
- Re: Can non-prefetchable memory reads/writes be combined by bridges?
- From: Kevin Normoyle <Kevin.Normoyle@Sun.COM>
- PCI-X / PCI Bus speed throttling
- From: "Jim Ranlett - SST" <jimr@seven-systems.com>
- Re: PCI-X / PCI Bus speed throttling
- From: Amit Shah <amits@agere.com>
- Re: PCI-X / PCI Bus speed throttling
- Re: Driving the AD bus when signaling split response
- From: "Muzammil Rasool" <muzammil@and-or.com>
- Re: PCI-X / PCI Bus speed throttling
- From: "Ingraham, Andrew" <Andrew.Ingraham@compaq.com>
- Re: PCI-X / PCI Bus speed throttling
- From: Amit Shah <amits@agere.com>
- Re: PCI-X / PCI Bus speed throttling
- From: "Ingraham, Andrew" <Andrew.Ingraham@compaq.com>
- aligned 64-bit writes from CPU -> PCI
- From: Brian Hutsell <bhutsell@nvidia.com>
- PME# Question
- From: Lukas Reinbold <lreinbold@syskonnect.de>
- Re: PME# Question
- From: Marco Brambilla <marco-tpa.brambilla@st.com>
- Re: PME# Question
- From: Lukas Reinbold <lreinbold@syskonnect.de>
- Please Remove
- From: "Mark Brown" <mark@quicklogic.com>
- RE: PME# Question
- From: "O'Shea, David J" <david.j.oshea@intel.com>
- 21154BC vs. 21154BE DEC/Intel Bridge
- From: Mike Dini <mdini@dinigroup.com>
- RE: 21154BC vs. 21154BE DEC/Intel Bridge
- From: Mike Wang <mike.wang@3WARE.com>
- I/O BARs
- From: "Muzammil Rasool" <muzammil@and-or.com>
- Re: 21154BC vs. 21154BE DEC/Intel Bridge
- From: Christer Olsson <Christer.Olsson@emw.ericsson.se>
- RE: 21154BC vs. 21154BE DEC/Intel Bridge
- From: "Adam Barnes" <adam@varisys.co.uk>
- Re: Re: PME# Question
- From: Lukas Reinbold <lreinbold@syskonnect.de>
- how to get removed from this mailing list?
- From: "Askew, Ray" <ray.askew@intel.com>
- RE: I/O BARs
- From: "Weng Tianxiang" <WTX@umem.com>
- RE: I/O BARs
- From: Richard Walter <rwalter@brocade.com>
- Cardbus 32-bit PC CARD
- From: "Harkema, G.A." <G.A.Harkema@tue.nl>
- converting a PCI 32/33 into a PC104+
- From: "Daniel DeConinck" <daniel.deconinck@sympatico.ca>
- PCI Card
- From: "A Mohammed Arif" <arif@hyd.hellosoft.com>
- non-prefetchable 64 bits memory bars in PCIX
- From: Noam Bloch <noam@mellanox.co.il>
- No Subject
- Question about PCI ordering rules
- From: "Richard Iachetta" <iachetta@us.ibm.com> (by way of Daniel Weaver <dan.weaver@znyx.com>)
- 64-bit, 66MHz Connector Options
- From: "Jim Ranlett - SST" <jimr@seven-systems.com>
- Re: 64-bit, 66MHz Connector Options
- From: Neal Palmer <neal@dinigroup.com>
- Urgent information required, from all ...
- From: JIg Saw <electrical105@yahoo.com>
- Split Completions
- From: "Muzammil Rasool" <muzammil@and-or.com>
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