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changing info when completing delayed reads.
From
: Kevin Normoyle <Kevin.Normoyle@Sun.COM>
Membership Related Question
From
: Chun Hung Lin <ChunHungLin@AIROHA.com.tw>
Re: Membership Related Question
From
: "Velayutham V" <velayuthamv@myw.ltindia.com>
pci testing
From
: GAYATHRI PRABHU <gayathri@crlbel.ernet.in>
Re: pci testing
From
: "Velayutham V" <velayuthamv@myw.ltindia.com>
Re: Peer-to-peer transactions
From
: Paul Capes <pcapes@ics-ltd.com>
Re: Peer-to-peer transactions
From
: "Peter Marek" <peter.marek@marekmicro.de>
Kinh gui: Quy Don vi
From
: "Cong ty Co phan Phan mem TLC" <tlchn@hn.vnn.vn>
Re: Peer-to-peer transactions
From
: "Mikhail Matusov" <matusov@squarepeg.ca>
Is the following Spartan-II FG456 package LogiCORE PCI pinout correct?
From
: "Kevin Brace" <kevinbraceusenet@hotmail.com>
Wanted: Standard LogiCORE PCI pinout of various Xilinx FPGAs
From
: "Kevin Brace" <kevinbraceusenet@hotmail.com>
Re: Fw: PCI Clock
From
: "Andreas Bergmann" <a.bergmann@electronic-design.com>
What is memory allocation boundery in Dindows?
From
: Henry Gong <hgong@cisco.com>
Re: What is memory allocation boundery in Dindows?
From
: "Peter Marek" <peter.marek@marekmicro.de>
Re: What is memory allocation boundery in Dindows?
From
: Dimiter Popoff <tgi_earth@yahoo.com>
Re: What is memory allocation boundery in Dindows?
From
: "Monish Shah" <monish.shah@indranetworks.com>
Re: What is memory allocation boundery in Dindows?
From
: Dimiter Popoff <tgi_earth@yahoo.com>
Re: What is memory allocation boundery in Dindows?
From
: Daev Roehr <daevr@atc.creative.com>
Re: What is memory allocation boundery in Dindows?
From
: "Paul Miranda" <paul.miranda@amd.com>
RE: What is memory allocation boundery in Dindows?
From
: "Weng Tianxiang" <WTX@umem.com>
New PCI card developing
From
: "Sergey Platovskikh" <sergey.platovskikh@vissim.no>
Re: New PCI card developing
From
: kevin.sharpe@btinternet.com
Re: ISA to PCI
From
: "Sergey Platovskikh" <sergey.platovskikh@vissim.no>
RE: What is memory allocation boundery in Dindows?
From
: "Peterson, George W" <george.w.peterson@intel.com>
Re: What is memory allocation boundery in Dindows?
From
: "Monish Shah" <monish.shah@indranetworks.com>
RE: New PCI card developing
From
: "Austin Franklin" <austin@darkroom.com>
Re: New PCI card developing
From
: "Kevin Brace" <kevinbraceusenet@hotmail.com>
Re: New PCI card developing
From
: "Kevin Brace" <kevinbraceusenet@hotmail.com>
RE: New PCI card developing
From
: "Kevin Brace" <kevinbraceusenet@hotmail.com>
RE: New PCI card developing
From
: "Austin Franklin" <darkroom@ix.netcom.com>
RE: New PCI card developing
From
: "Kevin Brace" <kevinbraceusenet@hotmail.com>
RE: New PCI card developing
From
: "Kevin Brace" <kevinbraceusenet@hotmail.com>
Re: New PCI card developing
From
: "Venkateshwarlu V" <venkateshwarluv@myw.ltindia.com>
Re: New PCI card developing
From
: "Marco Serafini - QR s.r.l" <r&d@qrverona.it>
Re: New PCI card developing
From
: Vashek Weis <plx-supp@ast.co.il> (by way of Daniel Weaver <dan.weaver@znyx.com>)
Re: New PCI card developing
From
: "Sergey Platovskikh" <sergey.platovskikh@vissim.no>
Re: New PCI card developing
From
: "Kevin Brace" <kevinbraceusenet@hotmail.com>
Re: New PCI card developing
From
: "Kevin Brace" <kevinbraceusenet@hotmail.com>
DMA Time Out
From
: "I. Servan Uzun" <isu@btae.mam.gov.tr>
Primary Bus Number > Secondary Bus Number
From
: Lloyd Bircher <nicad2@yahoo.com>
Interrupt Disable / Status Bit: PCI 2.3
From
: "Parag Birmiwal" <birmiwal@us.ibm.com>
Fast Devsel PCI to PCI Bridge
From
: "Charles Neumann" <c.neumann@aristoslogic.com>
Card bus
From
: "Lalith Kumar" <lalithkumart@myw.ltindia.com>
RE: Card bus
From
: Chun Hung Lin <ChunHungLin@AIROHA.com.tw>
Re: Agilent E2928A PCI analyzer with serial port...
From
: Vincent Cheng <vincent.cheng@tundra.com>
RE: Agilent E2928A PCI analyzer with serial port...
From
: "Austin Franklin" <austin@darkroom.com>
PCI connection to PTMC on cPCI carrier
From
: "dinesh" <dinesh@cosystems.com>
PCI bridge with local bus
From
: "dinesh" <dinesh@cosystems.com>
Re: PCI connection to PTMC on cPCI carrier
From
: Ivor Bowden <ivor@peritek.com>
Saw your website
From
: <Susab 12r76k90@bigfoot.com>
M66EN and PRSNT signals
From
: Anand.Kuriakose@smartm.com
RE: M66EN and PRSNT signals (re-send)
From
: "Ingraham, Andrew" <Andrew.Ingraham@hp.com>
Expansion Card Physical Dimension & Tolerances
From
: "Velayutham V" <velayuthamv@myw.ltindia.com>
Multifunction Add-In Cards and PCI BIOS Enumeration
From
: Scott Davis <sdavis@Futurex.com>
Re: Multifunction Add-In Cards and PCI BIOS Enumeration
From
: Steve Blightman <steve@alacritech.com>
RE: Multifunction Add-In Cards and PCI BIOS Enumeration
From
: "Sudeep Dennis" <sudeep.dennis@wipro.com>
Re: Multifunction Add-In Cards and PCI BIOS Enumeration
From
: "Paul Miranda" <paul.miranda@amd.com>
What is scatter/ gather. I am making a frame grabber with DMA.
From
: "Support@PixelSmart.com" <support@pixelsmart.com>
Re: Multifunction Add-In Cards and PCI BIOS Enumeration
From
: "Alexander Bezrukov" <alb_@pisem.net>
Re: What is scatter/ gather. I am making a frame grabber with DMA.
From
: Drew Eckhardt <drew@PoohSticks.ORG>
Cardbus Power Management
From
: "Sudeep Dennis" <sudeep.dennis@wipro.com>
Re: Cardbus Power Management
From
: "Velayutham V" <velayuthamv@myw.ltindia.com>
Cardbus specification
From
: "Sudeep Dennis" <sudeep.dennis@wipro.com>
Cardbus interfaces
From
: Jon Keeble <j.keeble@fairlightesp.com.au>
RE: What is scatter/ gather. I am making a frame grabber with DMA.
From
: Irv Negrin <Negrin@flarion.com>
Re: Multifunction Add-In Cards and PCI BIOS Enumeration
From
: "Peter Marek" <peter.marek@marekmicro.de>
SERIRQ on PCI-connectror
From
: "Bichler, Alexander" <alb@msc-ge.com>
Re: SERIRQ on PCI-connectror
From
: "Velayutham V" <velayuthamv@myw.ltindia.com>
Re: What is scatter/ gather. I am making a frame grabber with DMA .
From
: "Vashek Weis" <vashek@ast.co.il> (by way of Daniel Weaver <dan.weaver@znyx.com>)
RE: SERIRQ on PCI-connectror
From
: "Frank Story" <frank.story@acoustictech.com>
Crossing the First 4 GB Address Boundary
From
: Rob Kellogg <RKellogg@netoctave.com>
Re: Crossing the First 4 GB Address Boundary
From
: "Richard Iachetta" <iachetta@us.ibm.com>
PCI Express spec review
From
: Gord Caruk <Gord@ati.com>
改善掉髮, 預防禿頭的最佳選擇
From
: nv_op11b1jc@bloomberg.com
use lock# to solve deadlock?
From
: lyf <liuyunfei@routerd.com>
? PCI diagnosis software ( running under windows )
From
: "Support@PixelSmart.com" <support@pixelsmart.com>
Re: ? PCI diagnosis software ( running under windows )
From
: "Alexander Bezrukov" <alb_@pisem.net>
Re: ? PCI diagnosis software ( running under windows )
From
: "Velayutham V" <velayuthamv@myw.ltindia.com>
Re: use lock# to solve deadlock?
From
: "Alexander Bezrukov" <alb_@pisem.net>
Re: ? PCI diagnosis software ( running under windows )
From
: "Khan Kibria" <kkibria@iss-us.com>
Looking for a Windows Utility
From
: "Lawrence Mburu" <lawrence_mburu@sil.org>
Re: ? PCI diagnosis software ( running under windows )
From
: scitel@t-online.de (Dr. Gerhart Hlawatsch)
Re: ? PCI diagnosis software ( running under windows )
From
: "Peter Marek" <peter.marek@marekmicro.de>
PTMC carrier card
From
: "dinesh" <dinesh@cosystems.com>
PCI to PCI bridge
From
: GAYATHRI PRABHU <gayathri@crlbel.ernet.in>
Re: PCI to PCI bridge
From
: "Peter Marek" <peter.marek@marekmicro.de>
Rules for setting/clearing Memory Access Enable bit of Command Register
From
: "Support@PixelSmart.com" <support@pixelsmart.com>
Re: Rules for setting/clearing Memory Access Enable bit of Command Register
From
: "Alexander Bezrukov" <alb_@pisem.net>
RE: Rules for setting/clearing Memory Access Enable bit of Command Register
From
: "Diamant, Nimrod" <nimrod.diamant@intel.com>
Re: Rules for setting/clearing Memory Access Enable bit of Command Register
From
: "Alexander Bezrukov" <alb_@pisem.net>
problem with 21052-AB
From
: hennie.van.de.poel@philips.com
Diagnosing tool kit
From
: "Lawrence Mburu" <lawrence_mburu@sil.org>
Re: ? PCI diagnosis software ( running under windows )
From
: "Velayutham V" <velayuthamv@myw.ltindia.com>
PLX 9080 in 3.3V signaling environment
From
: Jim Stevens <Jim.Stevens@measurementcomputing.com>
RE: Rules for setting/clearing Memory Access Enable bit of Command Register
From
: "O'Shea, David J" <david.j.oshea@intel.com>
Re: PLX 9080 in 3.3V signaling environment
From
: "Vashek Weis" <vashek@ast.co.il> (by way of Daniel Weaver <dan.weaver@znyx.com>)
FW: PLX 9080 in 3.3V signaling environment
From
: Jim Stevens <Jim.Stevens@measurementcomputing.com>
Re: PLX 9080 in 3.3V signaling environment
From
: Carter Buck <CBuck@PLXTech.com>
Re: problem with 21052-AB
From
: "Alexander Bezrukov" <alb_@pisem.net>
RE: PLX 9080 in 3.3V signaling environment
From
: "Ingraham, Andrew" <Andrew.Ingraham@hp.com>
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