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- remove
- From: "Asato" <aac54490@pop17.odn.ne.jp>
- 64bit PCI card
- From: "Velayutham V" <velayuthamv@myw.ltindia.com>
- Re:64bit PCI card
- From: nimit.endlay@st.com
- Tired Of Going To Work?
- From: "Free Home Business Info" <jj028i_x7@bigfoot.com>
- Re: 64bit PCI card
- From: Neal Palmer <neal@dinigroup.com>
- RE: PCI-Express knowledge sharing
- From: "Nicholas Jones" <nickj@tality.com>
- PC GIA SIEU RE
- From: "ICC Vietnam" <iccvn01@vol.vnn.vn>
- difference between Mini-PCI and compact PCI
- From: "Prasad Joshi" <prasadj@controlnet.co.in>
- Prefetchable flag in BAR
- From: kseom@samsung.co.kr
- Re: Prefetchable flag in BAR
- From: Neal Palmer <neal@dinigroup.com>
- Re: Prefetchable flag in BAR
- From: "Brian Breuer" <brian@videopropulsion.com>
- PCI PCB physical characteristics
- From: Iņigo Alvarez Ximenez de Embun <patxipatxi@jazzfree.com>
- Control line pull-ups on mixed 3v/5v system
- From: Wayne Eckertson <WayneEckertson@VersaLogic.com>
- RE: Control line pull-ups on mixed 3v/5v system
- From: "Joseph Brcich" <jbrcich@juniper.net>
- Re: Control line pull-ups on mixed 3v/5v system
- From: "Ingraham, Andrew" <Andrew.Ingraham@hp.com>
- Re: PCI PCB physical characteristics
- From: "Ingraham, Andrew" <Andrew.Ingraham@hp.com>
- PCI air flow/thermal requirement
- From: Marisa Lin <mlin@redswitch.com>
- Cache Support Pins
- From: Wayne Eckertson <WayneEckertson@VersaLogic.com>
- Re: PCI PCB physical characteristics
- From: "Marco Serafini - QR s.r.l" <r&d@qrverona.it>
- PC 104 plus signals
- From: "Ola Wiberg" <ola_wiberg@viscount.com>
- RE: PC 104 plus signals
- From: Hartley Sweeten <hsweeten@mobl.com>
- Verilog models
- From: Chun Hung Lin <ChunHungLin@AIROHA.com.tw>
- PCI Express Developer's Guide
- From: "Nagesh K Vishnumurthy" <vnagesh@in.ibm.com>
- Looking for a 3-way PCI-X/PCI-X/PCI-X bridge
- From: Richard Walter <rwalter@brocade.com>
- PCI 3.3V Supply
- From: "Ola Wiberg" <ola_wiberg@viscount.com>
- Re: PCI 3.3V Supply
- From: David Duxstad <dux@ieee.org> (by way of Daniel Weaver <dan.weaver@znyx.com>)
- PCI 66MHz 5V Signaling environment?
- From: "Laurentiu Popovici" <Laurentiu.Popovici@elma.ro>
- V I/O pins of PCI
- From: "dinesh" <dinesh@cosystems.com>
- Secondary side PCI Reset
- From: Prasant.Hota@smartm.com
- RE: PCI 66MHz 5V Signaling environment?
- From: "Ingraham, Andrew" <Andrew.Ingraham@hp.com>
- RE: PCI 66MHz 5V Signaling environment?
- From: "Hofmans, Kim" <KHO@esko-graphics.com>
- RE: V I/O pins of PCI
- From: "Ingraham, Andrew" <Andrew.Ingraham@hp.com>
- Re: V I/O pins of PCI
- From: Ted Firlit <firlit@utmc.aeroflex.com>
- Re: PCI 66MHz 5V Signaling environment?
- From: Kevin Normoyle <Kevin.Normoyle@Sun.COM>
- pci-x slots
- From: "Victor Piron" <victor@r2000.com>
- RE: PCI 66MHz 5V Signaling environment?
- From: "Phipps, Michael" <michael.phipps@intel.com>
- RE: pci-x slots
- From: "Ingraham, Andrew" <Andrew.Ingraham@hp.com>
- FIFO interface to PCI
- From: "Faust, Barry" <BFaust@opex.com>
- RE: FIFO interface to PCI
- From: "Joseph Brcich" <jbrcich@juniper.net>
- RE: FIFO interface to PCI
- From: Irv Negrin <Negrin@flarion.com>
- RE: FIFO interface to PCI
- From: Neal Palmer <neal@dinigroup.com>
- PLL in PCI mode.
- From: "Kanti Ohri" <kko@dcmtech.co.in>
- Re: PLL in PCI mode.
- From: Neal Palmer <neal@dinigroup.com>
- RE: PLL in PCI mode.
- From: "Austin Franklin" <austin@darkroom.com>
- Grab your free ID !
- From: <adgard6@excite.com>
- Re: PLL in PCI mode.
- From: Neal Palmer <neal@dinigroup.com>
- RE: PLL in PCI mode.
- From: Neal Palmer <neal@dinigroup.com>
- RE: PLL in PCI mode.
- From: "Ingraham, Andrew" <Andrew.Ingraham@hp.com>
- RE: FIFO interface to PCI
- From: "Faust, Barry" <BFaust@opex.com>
- Re: FIFO interface to PCI
- From: Marco Brambilla <marco-tpa.brambilla@st.com>
- Re: FIFO interface to PCI
- From: Ben Yurick <byurick@keithley.com>
- Interfacing Coldfire uP to PCI bridge
- From: "Faust, Barry" <BFaust@opex.com>
- Fwd: Re: FIFO interface to PCI
- From: "Vashek Weis" <vashek@ast.co.il> (by way of Daniel Weaver <dan.weaver@znyx.com>)
- RE: Control line pull-ups on mixed 3v/5v system
- From: "Thomas Oelsner" <oelsner@quicklogic.com>
- RE: FIFO interface to PCI
- From: "Thomas Oelsner" <oelsner@quicklogic.com>
- Re: REQ64#PROBLEM
- From: Neal Palmer <neal@dinigroup.com>
- Re: Interfacing Coldfire uP to PCI bridge
- From: "Peter Marek" <peter.marek@marekmicro.de>
- Re: Fwd: Re: FIFO interface to PCI
- From: Marco Brambilla <marco-tpa.brambilla@st.com>
- 64-bit on-board devices on 32-bit PCI bus
- From: Anand.Kuriakose@smartm.com
- Retry and Parity.
- From: "Nagesh K Vishnumurthy" <vnagesh@in.ibm.com>
- RE:Req64# bit
- From: "Nagesh K Vishnumurthy" <vnagesh@in.ibm.com>
- Re: Retry and Parity.
- From: "Venkateshwarlu V" <venkateshwarluv@myw.ltindia.com>
- Re: 64-bit on-board devices on 32-bit PCI bus
- From: "Venkateshwarlu V" <venkateshwarluv@myw.ltindia.com>
- Re: Retry and Parity.
- From: "Nagesh K Vishnumurthy" <vnagesh@in.ibm.com>
- Re: 64-bit on-board devices on 32-bit PCI bus
- From: Neal Palmer <neal@dinigroup.com>
- Re: Retry and Parity.
- From: Neal Palmer <neal@dinigroup.com>
- Re: 64-bit on-board devices on 32-bit PCI bus
- From: ANAND KURIAKOSE <Anand.Kuriakose@smartm.com> (by way of Daniel Weaver <dan.weaver@znyx.com>)
- Re: Retry and Parity.
- From: "Richard Iachetta" <iachetta@us.ibm.com>
- Re: Retry and Parity.
- From: "Kevin Brace" <kevinbraceusenet@hotmail.com>
- Re: Retry and Parity.
- From: "Richard Iachetta" <iachetta@us.ibm.com>
- PCI Express Test Devices
- From: "CJ Parsons" <cparsons@lampreynetworks.com>
- Device at address 0
- From: "Parampalli, Niranjana" <niranjana.parampalli@intel.com>
- RE: Device at address 0
- From: "O'Shea, David J" <david.j.oshea@intel.com>
- RE: Device at address 0
- From: Neal Palmer <neal@dinigroup.com>
- Re: Device at address 0
- From: "Peter Marek" <peter.marek@marekmicro.de>
- Re: Retry and Parity.
- From: "Kevin Brace" <kevinbraceusenet@hotmail.com>
- RE: Device at address 0
- RE: Device at address 0
- From: Richard Walter <rwalter@brocade.com>
- RE: Device at address 0
- From: "Parampalli, Niranjana" <niranjana.parampalli@intel.com>
- Need PCI 2.3 spec
- From: Wayne Eckertson <WayneEckertson@VersaLogic.com>
- RE: Device at address 0
- The World's First Digital Drug
- From: <ralph5663r61@msn.com>
- Max Nr of IC in 66 MHz PCI ?
- From: "Silvano Bettinzana" <bettinzana@diadix.it>
- RE: 64-bit on-board devices on 32-bit PCI bus
- From: "Weng Tianxiang" <WTX@umem.com>
- RE: Device at address 0
- From: "O'Shea, David J" <david.j.oshea@intel.com>
- RE: 64-bit on-board devices on 32-bit PCI bus
- From: Neal Palmer <neal@dinigroup.com>
- RE: 64-bit on-board devices on 32-bit PCI bus
- From: ANAND KURIAKOSE <Anand.Kuriakose@smartm.com> (by way of Daniel Weaver <dan.weaver@znyx.com>)
- Using Motorola's MPC8245 in an add-in
- From: Corey Anderson <corey.anderson@motioneng.com>
- Re: Max Nr of IC in 66 MHz PCI ?
- From: "Peter Marek" <peter.marek@marekmicro.de>
- PCIX-MODE2: Rise/fall time
- From: Anil Kumar <akumar@nurlogic.com>
- PCIX-MODE2 : Zterm issue
- From: Anil Kumar <akumar@nurlogic.com>
- Would You Like a FREE Euro??
- From: <stats4588q57@websitetracker.com>
- DEVSEL#
- From: Chun Hung Lin <ChunHungLin@AIROHA.com.tw>
- Re: DEVSEL#
- From: "Miller" <lincj@genesyslogic.com.tw>
- Re:DEVSEL#
- From: nimit.endlay@st.com
- Create a PAYCHECK with your computer!
- From: <sue_bar25@hotmail.com>
- PCI Interrupts
- From: Paul Capes <pcapes@ics-ltd.com>
- Re: PCI Interrupts
- From: "Paul Miranda" <paul.miranda@amd.com>
- RE: PCI Interrupts
- From: "O'Shea, David J" <david.j.oshea@intel.com>
- Create a PAYCHECK with your computer!
- From: <sue_bar25@hotmail.com>
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