Mail Index
[Prev Page][Next Page]
- pci trace impedance
- From: "Hofmans, Kim" <kim.hofmans@barco.com>
- RE: 25MHz PCI Interface
- From: "Olaf Birkeland" <Olaf.Birkeland@fast.no>
- max write completion time
- From: Sanjay Cartic <scartic@ixiacom.com>
- Re: Maximum load of PCI-BUS
- From: Simon Lau <simon@eurekatech.com>
- RE: Maximum load of PCI-BUS
- From: "Ingraham, Andrew" <Andrew.Ingraham@compaq.com>
- WG: Maximum load of PCI-BUS
- From: "Becker, Karsten" <kbe@msc-ge.com>
- RE: Endian Mapping
- From: Richard Walter <rwalter@brocade.com>
- Re: Endian Mapping
- From: "Richard Iachetta" <iachetta@us.ibm.com>
- No Subject
- Re: Endian Mapping
- From: "Weng Tianxiang" <WTX@umem.com>
- Re: Endian Mapping
- From: "Richard Iachetta" <iachetta@us.ibm.com>
- FW: Endian Mapping
- From: "John Bush" <john_b@bvmltd.co.uk>
- Re: 25MHz PCI Interface
- From: "George Cosens" <cosens@linsys.ca>
- Re: Endian Mapping
- From: Manfred Kuhland <man@atlantek.com.au>
- RE: 25MHz PCI Interface
- From: "Ingraham, Andrew" <Andrew.Ingraham@compaq.com>
- Re: Endian Mapping
- From: Neal Palmer <neal@dinigroup.com>
- 25MHz PCI Interface
- From: "Weng Tianxiang" <WTX@umem.com>
- Re: Endian Mapping
- From: Dimiter Popoff <tgi_earth@yahoo.com>
- Endian Mapping
- From: Amit Shah <amits@agere.com>
- RE: pci tutorial
- From: "Ingraham, Andrew" <Andrew.Ingraham@compaq.com>
- Re: pci tutorial
- From: "Nalan Thamma" <nalan.thamma@amd.com>
- Re: pci tutorial
- From: tony@burched.com.au (burched - tony burch)
- RE: PCI-X Bus loading in Pf
- From: "Ingraham, Andrew" <Andrew.Ingraham@compaq.com>
- RE: PCI-X Bus loading in Pf
- From: "Ingraham, Andrew" <Andrew.Ingraham@compaq.com>
- RE: PCI-X Bus loading in Pf
- From: Brent Barr <b.barr@f5.com>
- PCI-X Bus loading in Pf
- From: Brent Barr <b.barr@f5.com>
- Re: Null Data Phases
- From: Neal Palmer <neal@dinigroup.com>
- Unknown Vendor ID
- From: Alan Shu <Shua@esi.com>
- Null Data Phases
- From: Bert Marston <bert@quadic.com>
- RE: PCI-X
- From: KC Chang <kc.chang@tundra.com> (by way of Daniel Weaver <dan.weaver@znyx.com>)
- pci bus connector
- From: "Victor Piron" <victor@r2000.com>
- No Subject
- From: "armen artoonians" <armen@mail.dci.co.ir>
- PCI-X
- From: Michael_Kharkover@amat.com
- Re: How to generate 64-bit transfer?
- From: "Prateek Sharma" <prateeks@us.ibm.com>
- How to generate 64-bit transfer?
- From: Taliaferro Smith <TollyS@Lewiz.com>
- help on PCI physical size
- From: Jennet Shi <zh_shi@yahoo.com>
- Where is standalone PCI arbiter chip?
- From: lecos@samsung.co.kr
- Re: PCI slot lost on power up?
- From: Norbert Pieth <nop@first.gmd.de>
- RE: PCI slot lost on power up?
- From: "Ingraham, Andrew" <Andrew.Ingraham@compaq.com>
- RE: PCI slot lost on power up?
- From: Ivor Bowden <ivor@peritek.com>
- 32 bit PCI, BAR -> FIFO.
- From: "Xavi Neuri" <xcano@neuricam.com>
- RE: PCI slot lost on power up?
- From: Kuipers Meindert-G18421 <meindert.kuipers@motorola.com>
- BIOS support for multiple host-PCI bridges on the same PCI bus
- From: neelay.das@philips.com
- RE: Compaq PCI-X Verilog core
- From: Brent Barr <b.barr@f5.com>
- Re: Compaq PCI-X Verilog core
- From: Amit Shah <amits@agere.com>
- RE: Compaq PCI-X Verilog core
- From: Brent Barr <b.barr@f5.com>
- Re: Compaq PCI-X Verilog core
- From: Amit Shah <amits@agere.com>
- RE: PCI slot lost on power up?
- From: Ivor Bowden <ivor@peritek.com>
- PCI slot lost on power up?
- From: Ivor Bowden <ivor@peritek.com>
- Compaq PCI-X Verilog core
- From: Brent Barr <b.barr@f5.com>
- Parallel Card
- From: Giovanni Brandi <gbrandi@fashion.it>
- Re: 32 bit PCI, Byte Lanes
- From: "Richard Iachetta" <iachetta@us.ibm.com>
- 32 bit PCI, Byte Lanes
- From: "Xavi Neuri" <xcano@neuricam.com>
- RE: 32 bit / 3.3V PCI slots?
- From: "Ingraham, Andrew" <Andrew.Ingraham@compaq.com>
- PCI Serial Card
- From: Marc Reviel <marc@powerlogix.com>
- Any suggestions?
- From: Elie Issa <carlo_9@yahoo.com>
- Fwd: RE: 32 bit / 3.3V PCI slots?
- From: Donald Connolly <Donald.Connolly@matrox.com>
- Re: Query regarding Eq's of Master State Machine
- From: "Weng Tianxiang" <WTX@umem.com>
- Query regarding Eq's of Master State Machine
- From: s-mallikarjuna.rao@st.com
- Membership for specific companies
- Compaq PCI-X Verilog core
- From: Brent Barr <b.barr@f5.com>
- pci design guide
- From: "VENKATESHWARLU V" <vv@myw.ltindia.com> (by way of Daniel Weaver <dan.weaver@znyx.com>)
- Re: How to handle a requirement for dual PCI FPGA configuration serial bit streams.
- From: Eric Crabill <crabill@xilinx.com> (by way of Daniel Weaver <dan.weaver@znyx.com>)
- RE: PCI clock jitter
- From: "Ingraham, Andrew" <Andrew.Ingraham@compaq.com>
- How to handle a requirement for dual PCI FPGA configuration serial bitstreams.
- From: "Jeffrey Journey" <jjourney@us.ibm.com>
- RE: Bridge throughput problems at 64bit/66Mhz
- From: "Calle, Jaime" <JC121128@exchange.SanDiegoCA.NCR.COM>
- Bridge throughput problems at 64bit/66Mhz
- From: Christer Olsson <Christer.Olsson@emw.ericsson.se>
- motherboards 654bit 66Mhz / and not with serverworks chipset
- From: "Naert, Hans" <hans.naert@barco.com>
- PCI-X 1.0 Specifications on Memory BARs
- From: "Muthrasanallur, Sridhar" <sridhar.muthrasanallur@intel.com>
- Re: PCI 64-bit master
- From: "Weng" <wtx@umem.com>
- Companies that sell PCI-X Test Environment
- From: "Srividya Viswanathan" <srividya.viswanathan@idt.com>
- RE: PCI 64-bit master
- From: Richard Walter <rwalter@brocade.com>
- Re: PCI-IDE Bridge/Controller Chips
- From: "Frank Story" <frank.story@acoustictech.com>
- PCI 64-bit master
- From: Tejendra Joshi <tejendraarunjoshi@yahoo.com>
- PCI-IDE Bridge/Controller Chips
- From: "John Weil" <ra8636@email.sps.mot.com>
- RE: Read Speed
- From: "Olaf Birkeland" <olaf.birkeland@fast.no>
- RE: PMC BUSMODE[2..0]
- From: Lame Brooks-G14738 <Brooks_Lame-G14738@email.mot.com>
- RE: Read Speed
- From: Richard Walter <rwalter@brocade.com>
- PMC BUSMODE[2..0]
- From: Ivor Bowden <ivor@peritek.com>
- RE: Read Speed
- From: "Olaf Birkeland" <Olaf.Birkeland@fast.no>
- host cycle
- From: Philex_Lin@novatek.com.tw
- PMC BUSMODE[2..0]
- From: Ivor Bowden <ivor@peritek.com>
- Re: Question on DAC
- From: "Weng" <wtx@umem.com>
- Re: Incorrect Target Termination?
- From: Gérard Roudier <groudier@club-internet.fr>
- Question on DAC
- From: James Murray <jmurray@triscend.com>
- Incorrect Target Termination?
- From: bs844@freenet.carleton.ca (Konstantin Neskovic)
- Re: Incorrect Target Termination?
- From: "Weng" <wtx@umem.com>
- Incorrect Target Termination?
- From: bs844@freenet.carleton.ca (Konstantin Neskovic)
- Re: Motherbards with 64 bit/66 MHz PCI slots
- From: "John Birkner" <birkner@quicklogic.com>
- Re: New to forum!
- From: Lucien Murray-Pitts <lucien@tardis.ed.ac.uk> (by way of Daniel Weaver <dan.weaver@znyx.com>)
- Re: Motherbards with 64 bit/66 MHz PCI slots
- From: Robert Lindsell <robertl@research.canon.com.au>
- Motherbards with 64 bit/66 MHz PCI slots
- From: "George Cosens" <cosens@linsys.ca>
- SIG "approved" and OpenCores RE: New to forum!
- From: Lame Brooks-G14738 <Brooks_Lame-G14738@email.mot.com> (by way of Daniel Weaver <dan.weaver@znyx.com>)
- New to forum!
- From: "Miha Dolenc" <mihapci@email.si> (by way of Daniel Weaver <dan.weaver@znyx.com>)
- SERVERWORKS HEsl /TYAN/SUPERMICRO
- From: "Naert, Hans" <hans.naert@barco.com>
- RE: Can you use a 66MHz PCI device on AGP?
- From: "Adam Barnes" <adam@varisys.co.uk>
- Can you use a 66MHz PCI device on AGP?
- From: Robert Lindsell <robertl@research.canon.com.au>
- Re: Thunder HEsl S2567 / PCI 64 - 66MHz
- From: "Weng" <wtx@umem.com>
- Re: Thunder HEsl S2567 / PCI 64 - 66MHz
- From: "Weng" <wtx@umem.com>
- Thunder HEsl S2567 / PCI 64 - 66MHz
- From: "Naert, Hans" <hans.naert@barco.com>
- Pci-sig mailing list administrative note
- From: Daniel Weaver <dan.weaver@znyx.com>
- Mailing List SPAM
- From: Alan Deikman <Alan.Deikman@znyx.com> (by way of Daniel Weaver <dan.weaver@znyx.com>)
- B690x0
- From: Dimiter Popoff <tgi@bulnet.bg>
- RE: streaming PCI / STOP after 4/8 words
- From: André David <Andre.David@cern.ch>
- Re: Belling the cat
- From: "Weng" <wtx@umem.com>
- Belling the cat
- From: Daniel Weaver <dan.weaver@znyx.com>
- streaming PCI / STOP after 4/8 words
- From: "Naert, Hans" <hans.naert@barco.com>
- Re: How To Pay Off Loans Faster! -PYTJ
- From: Vikas.Mishra@smartm.com
- Re: How To Pay Off Loans Faster! -PYTJ
- From: Henry Gong <hgong@cisco.com>
- unsubcribe
- From: "hasti kolahduz" <hasti.ke@kavosh.net>
- PCI-X add in min trace length requirement
- From: Raj Gandhi <raj.gandhi@qlogic.com>
- CardBus to PCI Extender
- From: Mike Dini <mdini@dinigroup.com>
- i21152 PCI-PCI Bridge + Win2K
- From: Lucien Murray-Pitts <lucien@tardis.ed.ac.uk>
- Re: CBE signal decoding in VHDL
- From: "Weng" <wtx@umem.com>
- CBE signal decoding in VHDL
- From: "ALARMELU MANGAI P R" <amg@myw.ltindia.com>
- RE: How To Pay Off Loans Faster! -PYTJ
- From: Sasin Chimprabha <SasinC@thmulti.com.sg>
- Re: How To Pay Off Loans Faster! -PYTJ
- About callback / Servicio de callback.
- From: servaltem@sinectis.com
- CACHE ON PCI SIDE
- From: "SUSHANT S RANADE" <ssr@myw.ltindia.com>
- CMB Components looking to BUY the following components! 4-25-01
- From: JOE@CMBCOMPONENTS.COM
- AW: What is the speed of PCI
- From: "Heiner, Andreas" <HeinerA@Becker.de>
- RE: Fw: why Master/Target cannot change its mind
- From: Richard Walter <rwalter@brocade.com>
- Re: Fw: why Master/Target cannot change its mind
- From: "Weng" <wtx@umem.com>
- Re: Fw: why Master/Target cannot change its mind
- From: Wen-King Su <wen-king@myri.com>
- Re: Fw: why Master/Target cannot change its mind
- From: Gérard Roudier <groudier@club-internet.fr>
- How to dinamically reserve memory for device's resources?
- From: pablonegri@camaileon.com
- Fw: why Master/Target cannot change its mind
- From: "Weng" <wtx@umem.com>
- What is the speed of PCI
- From: "Jay Cann" <jcann@genuity.com>
- RE: Purposeful Parity control
- From: Ross Harvey <ross@ghs.com>
- RE: Purposeful Parity control
- From: Kevin Normoyle <kbn@gluon.Eng.Sun.COM>
- memory commands
- From: "VENKATESHWARLU V" <vv@myw.ltindia.com>
- a terrible VHDL problem
- From: "Weng" <wtx@umem.com>
- RE: RE: VIO pin connection
- From: "Ingraham, Andrew" <Andrew.Ingraham@compaq.com>
- Re: RE: VIO pin connection
- RE: VIO pin connection
- From: "Ingraham, Andrew" <Andrew.Ingraham@compaq.com>
- Re: VIO pin connection
- From: "Eric de Jong" <info@simultime.nl>
- Latency timer
- From: Joseph W Schulingkamp <jschulingkamp@agere.com>
- RE: Purposeful Parity control
- From: Lame Brooks-G14738 <Brooks_Lame-G14738@email.mot.com>
- Re: Purposeful Parity control
- From: tlyungha@collins.rockwell.com
- RE: VIO pin connection
- From: Raj Gandhi <raj.gandhi@qlogic.com>
- RE: VIO pin connection
- From: "Ingraham, Andrew" <Andrew.Ingraham@compaq.com>
- 64bit 66MHz PCI chip
- From: Zhong Shi <zshi2@ece.utexas.edu>
- VIO pin connection
- From: Raj Gandhi <raj.gandhi@qlogic.com>
- RE: Purposeful Parity control
- From: "Bruce Young" <bayoung@bigfoot.com> (by way of Daniel Weaver <dan.weaver@znyx.com>)
- RE: Purposeful Parity control
- From: Wen-King Su <wen-king@myri.com>
- Re:Re:PCI ARBITRATION & INTERRUPTS
- From: "SUSHANT S RANADE" <ssr@myw.ltindia.com>
- Header Type Register
- From: "SUSHANT S RANADE" <ssr@myw.ltindia.com>
- PCI Spec History
- From: "Bruce Young" <bayoung@bigfoot.com>
- RE: Purposeful Parity control
- From: "O'Shea, David J" <david.j.oshea@intel.com>
- Re: Purposeful Parity control
- From: Dimiter Popoff <tgi@bulnet.bg>
- RE: PCI Politics (was RE: why Target cannot change its mind)
- From: "Austin Franklin" <austin@darkroom.com>
- RE: Purposeful Parity control
- From: "Faria, Dick" <Dick.Faria@compaq.com>
- Fwd: Re: Purposeful Parity control
- From: Alan Deikman <Alan.Deikman@znyx.com>
- RE: PCI Politics (was RE: why Target cannot change its mind)
- From: Alan Deikman <Alan.Deikman@znyx.com>
- RE: Purposeful Parity control
- From: fmnemeth@collins.rockwell.com
- RE: Purposeful Parity control
- From: Gord Wait <Gord_Wait@spectrumsignal.com>
- Re: Purposeful Parity control
- From: Dimiter Popoff <tgi@bulnet.bg>
- Purposeful Parity control RE: PCI Politics (was RE: why Target cannot change its mind)
- From: Lame Brooks-G14738 <Brooks_Lame-G14738@email.mot.com>
- Mail from CELLIT Technologies (RE: Why cannot Target change its mind)
- From: "Ingraham, Andrew" <Andrew.Ingraham@compaq.com>
- RE: PCI Politics (was RE: why Target cannot change its mind)
- From: "Austin Franklin" <austin@darkroom.com>
- PCIX split completion DWORD with req64 asserted
- From: Neal Palmer <neal@dinigroup.com>
- PCI Politics (was RE: why Target cannot change its mind)
- From: Dimiter Popoff <tgi@bulnet.bg>
- PCI Politics (was RE: why Target cannot change its mind)
- From: Alan Deikman <Alan.Deikman@znyx.com>
- Fw: Why cannot Target change its mind
- From: "CELLIT Technologies" <cellit@mail.cellit.com>
- Oh, my poor target...
- From: Eric Crabill <eric.crabill@xilinx.com>
- Fw: Why cannot Target change its mind
- From: "CELLIT Technologies" <cellit@mail.cellit.com>
- Fw: Why cannot Target change its mind
- From: "CELLIT Technologies" <cellit@mail.cellit.com>
- Fw: Why cannot Target change its mind
- From: "CELLIT Technologies" <cellit@mail.cellit.com>
- Fw: Why cannot Target change its mind
- From: "CELLIT Technologies" <cellit@mail.cellit.com>
- Fw: why Target cannot change its mind
- From: "CELLIT Technologies" <cellit@mail.cellit.com>
- Fw: Why cannot Target change its mind
- From: "CELLIT Technologies" <cellit@mail.cellit.com>
- Re: why Target cannot change its mind
- From: Dimiter Popoff <tgi_earth@yahoo.com> (by way of Daniel Weaver <dan.weaver@znyx.com>)
- Re: why Target cannot change its mind
- From: SHELL-SOFIA <tgi@bulnet.bg>
- Re: why Target cannot change its mind
- From: "Weng" <wtx@umem.com>
- Test
- From: SHELL-SOFIA <tgi@bulnet.bg>
- Re: why Target cannot change its mind
- From: "Weng" <wtx@umem.com>
- FWD: FW: PCI Configuration Registers accessed by 3rd device and not PCI Host
- From: "cellit " <cellit@mail.cellit.com>
- Re: why Target cannot change its mind
- From: Mike Dini <mdini@dinigroup.com>
- RE: why Target cannot change its mind
- From: "Austin Franklin" <austin@darkroom.com>
- Re: why Target cannot change its mind
- From: "Richard Iachetta" <iachetta@us.ibm.com>
- Re: why Target cannot change its mind
- From: Joseph W Schulingkamp <jschulingkamp@agere.com>
- RE: why Target cannot change its mind
- From: Srikiran Dravida <SrikiranD@ami.com>
- Re: why Target cannot change its mind
- From: Dimiter Popoff <tgi_earth@yahoo.com>
- FW: PCI Configuration Registers accessed by 3rd device and not PCI Host
- From: "Srividya Viswanathan" <srividya.viswanathan@idt.com>
- Re: why Target cannot change its mind
- From: "Richard Iachetta" <iachetta@us.ibm.com>
- Re: why Target cannot change its mind
- From: "Richard Iachetta" <iachetta@us.ibm.com>
- Re: why Target cannot change its mind
- From: Wen-King Su <wen-king@myri.com>
- Re: why Target cannot change its mind
- From: Joseph W Schulingkamp <jschulingkamp@agere.com>
- Re: why Target cannot change its mind
- From: Joseph W Schulingkamp <jschulingkamp@agere.com> (by way of Daniel Weaver <dan.weaver@znyx.com>)
- Re: why Target cannot change its mind
- From: "Weng" <wtx@umem.com>
- PCI Configuration Registers accessed by 3rd device and not PCI Host
- From: "Srividya Viswanathan" <srividya.viswanathan@idt.com>
- Re: why Target cannot change its mind
- From: "Richard Iachetta" <iachetta@us.ibm.com>
- Re: why Target cannot change its mind
- From: Joseph W Schulingkamp <jschulingkamp@agere.com>
- Re: why Target cannot change its mind
- From: "Richard Yuan" <yuan@quicklogic.com>
- Re: why Target cannot change its mind
- From: "Weng" <wtx@umem.com>
- RE: why Target cannot change its mind
- From: Srikiran Dravida <SrikiranD@ami.com>
- PCI ARBITRATION & INTERRUPTS
- From: "SUSHANT S RANADE" <ssr@myw.ltindia.com>
- Re: why Target cannot change its mind
- From: Neal Palmer <neal@dinigroup.com>
- [pci-sig] Plain text only please
- From: "Scott C. Karlin" <scott@CS.Princeton.EDU>
- why Target cannot change its mind
- From: "Weng" <wtx@umem.com>
Mail converted by MHonArc 2.5.2