some questions

["Rafiki Kim Hofmans" <tw38966@is1.bfu.vub.ac.be>]

Hi everyone,

yet I have some other questions....

1) state machine of PCI revision 2.0 p175 :

   B_BUSY
	goto B_BUSY	if(!FRAME# +...)
	goto IDLE	if FRAME#
        goto S_DATA	if (!FRAME# + !IRDY#)*...
	                    ^^^^^^^^^^^^^^^^^

  are those gotos arranged in descending priority ?
  Because then I'm wondering about the third goto.
  
  In case FRAME=true, then state= IDLE,
  In case FRAME=not true, then check the third goto (if the first goto is
  false of course)
  So the line (!FRAME# + !IRDY#) will in that case always be true.
  
  Why did they put !IRDY# in that line then (if the gotos are in
  descending priority) ?

2) When, at power up, the BIOS assigns a base address to the device...
   how does the BIOS know no parity error has occured ?
   Because the PERR enable bit must be set by the device driver, but 
   the device driver is only executed after boot up.
  
   Or does a configuration transaction doesn't need parity error checking
   ? 

3) I still don't quite understand how to assign the exact amount of
   memory and IO space a device needs.
   
   For my device, I connect a stc101(a link switch) to my PCI interface
   (xilinx fpga).
   The stc101 has an address range from address[4:0]
   
   For my IO base address I choosed ba[31:8] (the maximum,256 bytes)
   For my mem base address I choosed ba[31:16]
   
   Of course, these BA aren't the exact amount my device needs.
   
   Would the correct IO base address be BA[31:6] ? (respecting the
   the stc address[4:0] and reserved address1 and IO indecator address0)
   
   And how do I determine the exact amount the MEM base address needs ?
   
   

Thanks for your time and reading,

Kim



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