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re: PCI Bus Master memory read commands



> 
>                                             
> PCI to PCI bus bridge or host bus bridge do not have enough information
> when a transaction is initiated to determine how much data the master
> will be asking for. The whole reason for MRL and MRM is to provide an
> add-in card with a mechanism for specifying nominally how much data it
> will be reading in a single burst transaction.
> 
> -------------------------------------------------------------------
> Samuel H. Duncan                         duncan@poboxa.enet.dec.com
> Digital Equipment Corporation            s.duncan@ieee.org
> 129 Parker Street, PK03-1/R11            508-493-6794
> Maynard, MA 01754                        508-493-4461 (FAX)
> -------------------------------------------------------------------
> 
> 

I received a couple of responses similar to this one, stating that 
a host/PCI bridge cannot prefetch data when a master on the PCI 
side initiates a transaction with just a Memory Read (MR) command.
I was under the impression that bridges incorporate prefetch buffers
that do in fact prefetch more data than the master asks for. Then if
the master doesn't use the data it is discarded by the bridge. This
assuming that main memory on the host side is prefetchable.

1) Is a typical host/PCI bridge limited to only access the exact 
   amount of main memory data that a PCI-side master asks for 
   during an MR command?

2) If a PCI master uses Memory Read Line (MRL) or Memory Read 
   Multiple (MRM) commands to access main memory, can it attempt to
   continue a single burst indefinitely (assuming it observes the 
   4k page boundary rules), or is the burst length limited by a 
   preset "cache line" length? If limited, where does the line 
   length information reside and how does the PCI master access it?

Regards,
Phil Hallmark
____________________________________________________________________
Phil Hallmark					   ph:  512-418-0003
Analog Devices					   fax: 512-418-0006
6805 N. Capital of Tx Highway	            phil.hallmark@analog.com
Suite 250
Austin, Tx. 78731