JTAG/Boundary Scan

["Reza Vahedi" <reza@cognex.com>]

Hi,
I am a little confused by the PCI2.1 specification regarding
the JTAG/Boundary Scan signals. 
I do not intend to support PCI JTAG. I am trying to figure out
what I should do with the JTAG pins. 
Section 2.2.10 of the spec. says the following:

Expansion boards that do not support the IEEE 1149.1 interface should
hardwire the board's TDI pin to its TDO pin.

Section 4.3.3 says the following:
..if boundary scan is not implemented on the planar, TMS and TDI 
should be independently bused and pulled up each with ~5Kohm 
resistors, and TRST# and TCK should be independently bused 
and pulled down, each with ~5K ohm resistors. TDO should be left open.

Do I need to implement pull-up/pull-downs as stated in 4.3.3 or can
I just hardwire TDI and TDO as stated in 2.2.10?

Reza Vahedi
rvahedi@cognex.com


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