i960RP - host downloading code

[Noam Efrati <noam@genie.terra.co.il>]

Hello everybody,

This mail is specificly regurding the i960RP PCI bridge. If anyone has
an answer, it is welcomed.

I am working on a PCI design based on the i960RP, and
I intend to control the device from a PCI host. The fact that the core 
proccesor code can be downloaded from the host implies that it is 
possible to access the local bus while keeping the core proccesor in 
reset state. However, there are several difficulties and contradictions
in the user manual that are not clear to me:

1) PMCON is not accessible through ATU, (This I conclude from the fact
that it is not a PMMR - Peripheral Memory Mapped Register). Thus, it 
cannot be controlled by a PCI host. If we add the fact that the PMCON 
is configured to 8 bit width by power up defualt, it certainly looks like
a problem to me.

2) The ATU limit register and translate register are read only registers,
so I don't understand how do I control them.

3) The PMMR are mapped to low local memory addresses, while the physical
memory should be mapped to high local memory addresses. This means 
that every time PCI host needs to access a PMMR (for example, the DMA
controller registers) and then the physical memory (in order to build 
the DMA chain buffers), it must switch the ATU translate register. 
If this is correct, it could be a serious problem in a multitasking 
operating system.

4) Can I get a source code example of a host downloading code? Maybe 
this would help me understand some of the problems, along with 
specific answers to the above questions.


Thanks in advance,    

=========================================================================
Noam Efrati                    | e-mail: noam@terra.co.il  
Terra computers ltd.	       | phone : 972-7-467502		 
6 Ashuach st., Omer,           | fax   : 972-7-467475
84965 Israel                   |
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