Re: Latency for Bridges

[Norman J Rasmussen <Norman_J_Rasmussen@ccm.jf.intel.com>]

Text item: 

Just one little clarification to the statement below.  Host bus bridges are 
grant an additional 16 clocks of initial latency "...when the access hits a 
modified line in a cache.  However, the host bridge can never exceed 32 clocks."
 
This statement is important.  The exception does not give a blanket exception to
the host bridge in all cases.  If the access does not hit a modified line then 
the requirement is still 16 clocks!

Norm Rasmussen

Steve Belvin Wrote:
     
> Hi:
>   I am designing an expansion bus bridge between a backplane bus and PCI.  I 
> noticed in Revision 2.1 that host bridges are given special consideration for 
> initial latency (sect. 3.5.3.1, 32 rather than 16 clock cycles).
>
>     Is it the intent of the spec to allow *all* bus-to-bus bridge
>     (Base Class 06) devices a maximum initial latency of 32 clocks? 
No... The wording is as follows:
     
    "Host bus bridges are granted an addtional 16 clocks, to a maximum 
    of 32 clocks"
     
A host bus bridge is a "North Bridge ONLY".. other bridges like
PCI <-> ISA and PCI to VME or what ever are "Expansion Bus Bridges"
     
> In my system, the additional 16 clock cycles means having to retry less than 
> half rather of the transactions rather than *all* operations.
     
Yes, this is where PCI 2.1 traded performance for reduced 
latency.
     
This is very evedent in PCI to ISA 8 bit I/O cycles where the 
CPU is stalled waiting on the I/O to complete (even for a write 
as you are not allowed to post I/O cycles -:).
The PCI -> ISA bridge is required to use a delayed cycle
as all 8 bit I/O devices (unless NOWS* is asserted) will take 
more than 16 PCI CLKs.
     
     
Jeff
     
--
Jeff Wolford               INTERNET: jww@compaq.com 
Senior Member of Technical Staff
Advanced Architecture - Advanced Technology Development 
Compaq Computer Corp
(713) 514-9465
     
"The views expressed here are my own, and not those of my employer."

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Date: Mon, 12 Aug 96 17:50:42 CDT
Subject: Re: Latency for Bridges
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