Re[2]: Wakeup from a PCI device

[Bruce Young <Bruce_Young@ccm.jf.intel.com>]

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Yes, the intent is to define a reserved pin for this purpose. It was the add-in 
card problem that drove us over the edge to saying we needed a separate pin. The
ECR process will address exactly which one. (But of course, no one has used any 
of these since that would not be compliant with the spec :-)

BTW, How would a disk controller use this pin? The semantic of the pin is that 
it is asserted when the device wants to wake up the system. It is an 
asynchronous, active low open drain signal shared between all PCI slots in the 
system with the system logic as the receiver of the signal. The system logic 
then wakes the system up and once the CPU is running the OS, the OS will then go
out and enable the resources it needs such as the disk interfaces.

-Bruce

----------------


Bruce,
     
Is this a new pin to be defined on the existing connector?
     
At 10:25 AM 8/14/96 PDT, Bruce Young wrote:
     
>     So what do you think? Is this a non-issue that everyone agrees a 
>     separate pin for wakeup is a good idea? Or is everyone dead-set 
>     against adding a pin on principle!?
>
>     -Bruce Young, Intel Corporation
>     PCI SIG Power Management Working Group Chairman
     
What is the impact on the PCI add-in connector?   Is the new pin defined 
as a position on the add-in connector?   If it is not, then it prevents 
any add-in cards from making use of the new pin signalling method.   I 
think that shutting out the add-in board people from the Sleep wakeup 
mechanism would not please them.
     
In server machines, the disk array controllers would want to be able to 
use sleep mode signalling in addition to Network and COM devices.   Most 
really high-end (Server level) controllers are not built into the system, 
meaning they plug into a PCI connector.   If the connector does not have 
the new pin definition then I think that is a really BIG negative.
     
-David O'Shea
Corollary Inc.
daveo@corollary.com

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Subject: Re: Wakeup from a PCI device
From: "David O'Shea" <daveo@corollary.com>
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