Re: Transaction abort

[Devendra K Tripathi <tripathi@Synopsys.COM>]

Hi Rafi,


> Suppose I am trying to burst from a host PC as a master, to a slave PCI
> board, by copying data from the host memory, to the board, by the CPU.
> What happens if my board stops the transaction by doing Retry, Disconnect 
> 
> or Target-Abort, or the PCI arbitrator force the host to do a 
> Master-Abort?
> How can the CPU know that the transaction was interrupted, and after how
> many data phases?
> Dose the host bridge generates some kind of exception the CPU  in this 
> case?
> 


PCI does not specify the exact action that should be taken under these cases. The two
ABORT cases, do have status bits associated with them. Generally, Retry being 
considered a temporary phenomena, is supposed to be handled by host PCI interface 
itself. I would guess, though, that Retry info would be communicated to DMA involved 
and if there is latency issue, it may go to even higher level. PCI does suggest 
SERR# for target abort if there is no way to communicate it to device driver.
Hope it helps.

Thanks,
Tripathi.
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