Re: PCI I/O Space Consumption Limitation

[goudreau@dg-rtp.dg.com (Bob Goudreau)]

Devendra K Tripathi <tripathi@Synopsys.COM>
 
> It may be pointed here that you have to have a Memory BAR for every
> I/O BAR. The point is that PCI does not encourage to use I/O space
> at all. 

Indeed, revision 2.1 of the spec positively recommends *against* it.
See the "Implementation Note: Device Address Space" on page 26:

	It is highly recommended, [sic -- yes, there's an extraneous
	comma there] that a device request (via Base Address
	Register(s)) that its internal registers be mapped into Memory
	Space and not I/O Space.  In PC systems, I/O Space is limited
	and highly fragmented and will become more difficult to
	allocate in the future, however the use of I/O Space is
	allowed.  Requesting Memory Space instead of I/O Space allows
	a device to be used in a system that does not support I/O
	Space....

BTW, on a slightly related note, the last sentence of this
Implementation Note contains something pretty interesting with respect
to the "PC System BIOS and Base Address Register" discussion of two
weeks ago:

	Note:  A Base Address Register does not contain a valid
	address when it is equal to 0.

So, contrary to my complaints back then, the spec (post-2.0, anyway)
does indeed contain an explicit exception for zero-valued BARs!  Now,
if only this note could have been duplicated in chapter 6, where the
main discussion of BARs is found...

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