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PCI serial download
- To: Mailing List Recipients <pci-sig-request@znyx.com>
- Subject: PCI serial download
- From: kguy <kguy@a-d-inc.com>
- Date: Thu, 22 Aug 96 11:00 MST
- Resent-Date: Thu, 22 Aug 96 11:00 MST
- Resent-From: pci-sig-request@znyx.com
- Resent-Message-Id: <"8FmLD2.0.Us.gA97o"@dart>
- Resent-Sender: pci-sig-request@znyx.com
Dear Sirs,
I have a question regarding the automatic downloading of the SID and
SVID register in the 2C configuration space. Presently I see no way for the
system to know if the download occurred correctly. I am presently designing
a chip that downloads the SID and SVID. In the downloading process there
are checks for ACKS from the serial eeprom and even a checksum is verified
but there is no where in configuration space to indicate that an error
occurred or that the downloading is complete (We currently do retries to
config read/writes to the SID and SVID if downloading is in process but
these seems like it could cause a hang condition). My concern is the
incredible amount of time it takes to download (Serial eeproms work at a
clock speed of about 100KHZ max which takes about 29,000 pci clock cycles to
download 4 bytes and a checksum) and whether the SID and SVID are even
correct when its thru. Is there any chance of two bits being defined that
would indicate that the SID and SVID are downloaded and another bit
indicating that no error conditions occurred ?
It is quite possible I am concerned about something that does not matter
but I would appreciate your comments and insight into this. Thanks in advance.
KGUY
Kevin Guy
Senior Engineer
Advanced Designs, Inc
email address: kguy@a-d-inc.com
phone: (719)598-9224
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