Re: FW: Re[2]: PCI I/O Space Consumption Limitation

[Mark Gonzales <markg@scic.intel.com>]

"Taylor, Mike" writes
>I thought PCI/ISA bridges used subtractive decode and therefore were only   
>active in address spaces not acknowledged by any PCI bus. Aliasing by an   
>ISA card would therefore be prevented in any PCI used I/O space. The 256   
>bytes per I/O BAR restriction is therefore not due to ISA limitations.

I believe that legacy *device drivers* make use of the I/O address
aliasing property. So, if a new device claimed an alias of a legacy I/O
port, it would receive I/O accesses intended for the legacy device, and
both devices would fail to work.

I/O space accesses are usually much lower performance than memory space
accesses, so I wouldn't recommend using I/O space in a new device
design anyway.

--Mark
r
xe