[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
PCI to PCI Bridge with 2 independant clocks
- To: Mailing List Recipients <pci-sig-request@znyx.com>
- Subject: PCI to PCI Bridge with 2 independant clocks
- From: maubert@itmi.cgs.fr (Michel Aubert)
- Date: Mon, 26 Aug 1996 09:31:41 +0200
- Resent-Date: Mon, 26 Aug 1996 09:31:41 +0200
- Resent-From: pci-sig-request@znyx.com
- Resent-Message-Id: <"Vz3Ea2.0.3p3.wAL8o"@dart>
- Resent-Sender: pci-sig-request@znyx.com
Hi everybody,
Has anyone ever heard about a PCI to PCI bridge with two independant cloks
on primary and secondary bus ?
We have a design of an PCI expansion board with primary and secondary PCI
clocks at 33 Mhz. However the secondary PCI clock requires a more important
precision than those available on the primary bus.
A first solution was based on the i960RP but Intel has suppressed the
asynchronous mode.
Has anyone already met this kind of problem ?
Thanks a lot,
Best regards,
Michel AUBERT
**************************************************************************
* Michel Aubert ph. : 33 76 41 40 73 *
* Electronic System Engineer fax.: 33 76 90 09 22 *
* email : Michel.Aubert@itmi.cgs.fr*
* *
* ITMI APTOR *
* 61 Chemin du Vieux Chene *
* BP177 *
* 38244 MEYLAN CEDEX FRANCE *
* *
**************************************************************************
y œ Œ