[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
RE: PCI to PCI Bridge with 2 independant clocks
- To: Mailing List Recipients <pci-sig-request@znyx.com>
- Subject: RE: PCI to PCI Bridge with 2 independant clocks
- From: Jim Ulrich <jimu@pathlight.com>
- Date: Mon, 26 Aug 1996 09:29:53 -0400
- Resent-Date: Mon, 26 Aug 1996 09:29:53 -0400
- Resent-From: pci-sig-request@znyx.com
- Resent-Message-Id: <"DxAkq1.0.SH4.zNQ8o"@dart>
- Resent-Sender: pci-sig-request@znyx.com
Two quickees-
First, the errata about the Intel i960RP and async mode is supposedly
for the engineering steppings only (as far as we can tell from the
available errata sheets).
Second, try buying the DEC bridge card and provide an independant clock
for the secondary bus (rather than using the on-board PLL derived clock).
This might require some board hacking, but should be "do-able" (don't
you like those fancy engineering terms).
Jim Ulrich
jimu@pathlight.com
z l [