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RE: PCI interrupt request and PC platform
- To: Mailing List Recipients <pci-sig-request@znyx.com>
- Subject: RE: PCI interrupt request and PC platform
- From: ingvar_berg@x400.icl.co.uk
- Date: Fri, 30 Aug 1996 12:10:20 +0100
- Priority: NORMAL
- Reply-To: ingvar_berg@x400.icl.co.uk
- Resent-Date: Fri, 30 Aug 1996 12:10:20 +0100
- Resent-From: pci-sig-request@znyx.com
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From: Ali Najafi
> The PCI interrupt pins
>that are all routed to the same PC interrupt line are chained together and
>when that interrupt line is asserted, the ISR's in the chain are activated
>one after another to see if the interrupt was meant for them. Is this correct?
Yes, that's correct. But the method of chaining interrups is O/S
dependent. "Real" O/S's has a built-in mechanism to do the chaining of
the ISRs, while DOS, BIOS and maybe some more has no such support. In
this case, it's left to the ISR writer to do the chaining and
co-operate with the other ISRs.
/Ingvar
± \ L