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A BAR of 0 = disabled.
- To: Mailing List Recipients <pci-sig-request@znyx.com>
- Subject: A BAR of 0 = disabled.
- From: rwalter@auspex.com (Richard Walter)
- Date: Thu, 5 Sep 1996 09:49:11 -0700 (PDT)
- Resent-Date: Thu, 5 Sep 1996 09:49:11 -0700 (PDT)
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> >I agree that the enable bits should be OFF until a PCI board is properly set
> >up, although, technically, any BAR set to 00000000h is disabled.
<snip>
> I don't see how a BAR can be set to all 0, as there are hard-wire bits
> in the lower 4 bit positions of a BAR. If any of them are one, then it
> can't be set to zero. Perhaps you meant when the upper part of the BAR
> is set to all zero, but I don't see where it says that in the spec.
This came up recently in the discussion about mixing of 32-bit and 64-bit
BARs. On page 26 of the 2.1 spec, section 3.3.2. in the Implementation Note:
Device Address Space, the last sentence is "Note: A Base Address register
does not contain a valid address when it is equal to '0'".
Maybe this should also be explictly stated in the configuration chapter as
well in the next revision of the spec, because people who are looking for
information about BARs would look there first.
-Richard Walter
rwalter@auspex.com
Note: I speak for myself, not for Auspex.
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