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MWI bus cycles



I have two (and a half) questions regarding MWI bus cycles.

1)  Is it permissible for a target to assert STOP in the middle of a
cache line during an MWI transaction?

2)  If it is legal, should the following transfers by the master be made
with MW to get to the end of the cache line, or use MWI cycles?

2a) If it is not legal for 2.1, what about 2.0?

Thanks for your consideration,
Don Fry
Sequent Computer Systems, Inc.
(503) 578-4076 voice
(503) 578-4850 fax
donf@sequent.com
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