Implementation of PCI interface

[Simon Cameron <simonc@Vsl.Com.Au>]

Hello,

I am looking at providing an interface between a PCI bus and a FIFO and
Real Time Clock chip.

The PCI interface is only required to operate as a slave, however it must
accept burst memory read and writes to the FIFO.

I have seen several PCI reference designs that Xilinx, Altera, Cypress, Actel
etc, provide for their programmable logic devices.

Has anyone used any of these devices, or does anyone know of an off-the-shelf
device which provides a basic PCI to memory interface?

I am very interested in hearing of anyones experiences.

Thankyou,

Simon Cameron
simonc@vsl.com.au
à
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