RE: PCI DMA Controller

[tedlu@ix.netcom.com]

There are several sources about PCI bandwidth analysis:

1. From Intel:
http://www-cs.intel.com/oem_developer/chipsets/pci/general/pci001.html


                                                        Efficient Use of PCI
                                                    Platform Architecture Labs
                                                       Intel Corporation
                                                                   7/25/96

Introduction

Sharply higher system performance can often be achieved by selecting only
PCI peripherals which make efficient use of the PCI bus. Figure 1 shows network
throughput for a simple benchmark, TTCP, for five different PCI Network
Interface Cards (NICs). Since the system is held constant, the large
differences in the
observed performance are a direct result of the PCI card design. Knowledge
of huge performance differences such as these should lead system integrators
to select
PCI cards carefully. These differences should also motivate designers to
follow the rules for efficient PCI design. This paper is designed to
sensitize systems
integrators and PCI card designers to the importance of proper PCI design
and to present rules for efficient PCI design........

2. From PLX
http://www.plxtech.com


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>Resent-Date: Wed, 11 Sep 1996 13:49:22 -0400
>From: "Frank Moore" <fmoore@msai.mea.com>
>Date: Wed, 11 Sep 1996 13:49:22 -0400
>Subject: PCI DMA Controller
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>
>I am thinking about a PCI DMA controller design. It seems to me that I have
>seen a plot of PCI bandwidth versus # of words transferred. Does anyone know
>where I could find this plot again? Failing that, does anyone know where I
>could get info about the request to grant and system memory read latency for a
>master on the PCI bus.  Thanks Frank
í
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