Re: PCI Memory Devices

[Eric Ryherd <eric@vautomation.com>]

At 07:41 PM 9/11/96 -0700, you wrote:
>
>>> Anyone aware of sram, dram, etc. that has a pci interface?
>>
>> I've acually made this request to a number of DRAM manufacturerers
>> and it just didn't click for some reason.
>
>The reason is that PCI requires an awful lot of gates, it's way too slow
>for DRAM, and you can't put enough devices on a PCI bus to handle the
>actual
>number of DRAMs you need in a system, 8 to 32. This number is correct no
>matter how long you wait. Early CP/M systems had 8 to 32 DRAMs. TRS-80s did
>too. The IBM PC, PC/AT did too, and so do most 386, 486, Pentium and
>Pentium Pro systems.
>
>It's just a function of memory requirements (which always increase from one
>generation to the next) and cost per bit (which is always lower for the
>second-newest generation of DRAMs).

Is it really too slow for systems with 256K to 1M L2 caches these days?
PCI burst rate is reasonably high and the trick would be to design an
interface that is low latency. 3.3v @ 66Mhz coupled closely to the processor
gives very nice performance.

It doesn't make sense until you get to the point of 64M drams = 8 Megabytes
on ONE chip. It really starts to make sense with 256M drams = 32 Megabytes
on ONE chip! The logic required for PCI is MINISCULE compared to the 
DRAM array. I would even wager to say that the logic for the PCI would be
the same or even SMALLER than the logic required to implement EDO/PAGE/nibble
and all the other crazy interfaces.

The real benefit to the industry I see would be the simplification of the
user interface. No more pouring over hundreds of timing numbers to try to come
up with a common set of parameters to get second sources...

Eric Ryherd           eric@vautomation.com
VAutomation Inc.      Synthesizable HDL Cores
20 Trafalgar Sq #443  http://www.vautomation.com
Nashua NH 03063       (603)882-2282  FAX:882-1587
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