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PCI Hot Swap
- To: Mailing List Recipients <pci-sig-request@znyx.com>
- Subject: PCI Hot Swap
- From: Phil Cupryk <Phil.Cupryk@Matrox.COM>
- Date: Tue, 17 Sep 1996 08:57:02 -0400 (EDT)
- Cc: pcupryk@matrox.com
- Resent-Date: Tue, 17 Sep 1996 08:57:02 -0400 (EDT)
- Resent-From: pci-sig-request@znyx.com
- Resent-Message-Id: <"v6hAG1.0.aT.C1gFo"@dart>
- Resent-Sender: pci-sig-request@znyx.com
According to the PCI Specification Revision 2.1 (p. 127) Figure 4-4, system
robustness can be tested using the maximum AC waveform. I am specifically
interested in the overvoltage waveform. Injecting this type of waveform
will require an input tolerance of up to +11Volts, or some method of protection.
Since my input buffers are not 11Volt tolerant, I opted to place clamping
diodes to limit the overvoltage. However, in a hot swap situation, before
insertion into a live system, the board's Vcc input to the logic gate is at
ground potential. During insertion, when the pins make contact, the bus line
is clamped to ground through the overvoltage clamping diode to Vcc. This in
effect can cause the diode to conduct, thus allowing large currents to flow
through the diode, resulting in the logic gate to latch up and possibly
destroy itself when the power is finally applied.
I was wondering if anyone has experienced the same problem and what route
you have taken. Any suggestions/comments would be greatly appreciated.
Thanks in advance,
Phil
================================================================================
Phil Cupryk Matrox Electronic Systems
ASIC Hardware Design Engineer Video Products Group
EMAIL: pcupryk@matrox.com 1055 St-Regis Blvd.
TEL : (514) 685-7230 ext: 2789 Dorval, Quebec
FAX : (514) 685-7030 H9P 2T4
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