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Re: How does 3.3V 5V PCI buffers are toggeled.
- To: Mailing List Recipients <pci-sig-request@znyx.com>
- Subject: Re: How does 3.3V 5V PCI buffers are toggeled.
- From: "Monish Shah" <monish@mcsy2.fc.hp.com>
- Date: Tue, 17 Sep 1996 09:44:57 -0600
- In-Reply-To: "Yehuda D. Yizraeli" <yehuda@chipx.co.il> "How does 3.3V 5V PCI buffers are toggeled." (Sep 17, 4:24pm)
- References: <9609171321.AA02897@znyx.com>
- Resent-Date: Tue, 17 Sep 1996 09:44:57 -0600
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On Sep 17, 4:24pm, Yehuda D. Yizraeli wrote:
> Subject: How does 3.3V 5V PCI buffers are toggeled.
> Hi,
>
> Is there a signal in the spec and/or de-facto signal on the PCI boards
> which tells the chips its 3.3V OR 5V. This information is needed for turning
> on/off an extra drivers for 3.3V PCI compliance compared to 5V compliance.
Essentially, yes. There are a number of pins labeled "+5V (I/O)" or
"+3.3V (I/O)". These are the same pins; they are connected to 5V on a 5V
signalling slot and 3.3V on a 3.3V signalling slot. Your chip could look
at this to do what you want. Also, these are power pins and you could
(and probably should) run your drivers on them.
If you were looking for signal that actually went between a TTL low and a
TTL high for 3.3V vs. 5V, you won't find such a thing.
> regards, yehuda
Monish Shah
Hewlett Packard