Re: PCI DRAM Controller

[Mitch Kahn <mitch@demoworks.com>]

Galileo introduced a new part called the GT-64011
which is a "lite" version of the GT-64010 in a 208
pin PQFP. It includes an FPM/EDO dram controller
and a 32-bit i960-like slave bus (for ROM, SRAM, etc.)

It's about 25 bucks.

Do you think the market would like a plain PCI
DRAM controller?

Mitch



At 09:43 AM 9/19/96 PDT, you wrote:
>Hi, all...
>
>Does anyone know of a 32-bit PCI DRAM controller chip?  Feature wise, nothing
>more than support for EDO devices, and support for PCI burst accesses.
>
>I have seen host bridge chips with integrated DRAM controllers that can operate
>without the host CPU (e.g. Galileo GT-64010)... but they are typically overkill
>(in package size, cost, etc) for our intended application.  If possible, I
would
>very much like to avoid having to design around a PCI macro on a
FPGA/ASIC/CPLD.
>
>Thanks in advance... any help would be much appreciated!
>
>Regards,
>___________________________________________________________________
>Peter W.W. Ma                            | email:  ma@idacom.hp.com
>Design Engineer - Video Test Group       | phone:  +1 604 454-3463
>Hewlett-Packard IDACOM Telecom Operation | fax:    +1 604 454-3401
>#2301-4710 Kingsway Avenue, Burnaby, BC, Canada  V5H 4M2
>
Mitch Kahn
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