64 bit BARs

[Matt Kaufman <mek@sco.COM>]

Can a PCI device request more than 32 bits of memory space? It can certainly
be allocated memory anywhere in 64-bit space (assuming it implemented its BARs
properly) but should config software have to worry about a device wanting
more than 32 bits worth of data? I thought that given the low 4 bits of
memory BARs were predefined the limit was something like 2GB.

Reason I'm asking, reading the spec it states that when trying to
determine the size of a memory range you write 'all bits one' into 'the
register' and reading the value back. By my literalist reading, even if the
memory can be mapped anywhere in 64 bit space, config software need only
write all bits one to the lower of the 2 BARs that comprise a 64 bit address.
It needs to read both BARs if the device can be mapped anywhere, however.

Speaking of which, if a device can be mapped anywhere in 64 bit space,
is it correct to assume that to find where the device has been mapped
you must read 2 BARs, even though its likely the 'higher' BAR (the one
after the one whose lower order bits specify 'anywhere in 64 bit space')
in most systems will be all zeros? That is, the address is constructed by
'stringing together' the higher bar if its non-zero and the lower one?

Hope this makes sense. Comments?

Matt
ahU