PCI-Arbiter Extension

[Norman J Rasmussen <Norman_J_Rasmussen@ccm.jf.intel.com>]

---------------------------- Forwarded with Changes ---------------------------
From: pci-sig-request@znyx.com at SMTPGATE
Date: 10/11/96 1:41PM
*To: pci-sig-request@znyx.com at SMTPGATE
Subject: PCI-Arbiter Extension
-------------------------------------------------------------------------------

Text item: 

It is impossible unless the original PCI arbiter understands that a cascaded 
arbiter is to be used.  Since arbitration is pipelined there are conditions in 
which two devices can believe that they own the bus.

If the primary arbiter knows that a second level is supported, then the first 
arbiter must not deassert one GNT# and assert a different GNT# on the same 
clock. (WHich the spec allows while the bus is active.)  The first level arbiter
must ALWAYS cause a dead clock between the deassertion of one GNT# and the 
assertion of the next GNT#.  If the arbiter never deasserts a GNT# until FRAME# 
is asserted, this can cause a hand system when a master removes its REQ# because
it changed it mind.  (THis can occur when the master enable bit is cleared.)

Many have tried this with pals and such but all have failed because the first 
level arbiter did not account for a second level arbiter.

Norm

Hello Experts,
     
does anyone know a reasonable way how to extend the PCI-Arbiter, 
which normally resides in the ChipSets north bridge ?
     
Most ChipSets implement a set of 4 REQ#/GNT# pairs, which should be 
sufficient in normal desktop PC systems. But if for any reason I have 
to connect more than those 4 busmaster capable devices to the bus, 
how can the built-in arbiter be extended in an easy way ?
     
Any comments appreciated
Thanks,
Karl Neumayer
neumayk@kontron.de

Text item: External Message Header

The following mail header is for administrative use
and may be ignored unless there are problems.

***IF THERE ARE PROBLEMS SAVE THESE HEADERS***.

To: Mailing List Recipients <pci-sig-request@znyx.com>
Resent-Sender: pci-sig-request@znyx.com
Precedence: list
X-Loop: pci-sig@znyx.com
X-Mailing-List: <pci-sig@znyx.com> archive/latest/3766
Resent-Message-Id: <"IygLy2.0.yx3.BBZNo"@dart>
Subject: PCI-Arbiter Extension
From: neumayk@kontron.de (Karl Neumayer)
Content-Type: text/plain; charset="us-ascii"
Mime-Version: 1.0
X-Mailer: Windows Eudora Version 1.4.4
X-Sender: neumayk@kontron.de
Message-Id: <9610111241.AA18885@noname>
Date: Fri, 11 Oct 96 13:41:11 +0100
Resent-Date: Fri, 11 Oct 96 13:41:11 +0100
Received: by znyx.com (5.65/1.35)
     id AA16169; Fri, 11 Oct 96 04:46:40 -0700
Received: from znyx.com by netcomsv.netcom.com with SMTP (8.6.12/SMI-4.1)
     id EAA14558; Fri, 11 Oct 1996 04:46:59 -0700
Received: from netcomsv.netcom.com (uumail1.netcom.com [163.179.3.50]) by ormail
.intel.com (8.7.6/8.7.3) with SMTP id EAA04350; Fri, 11 Oct 1996 04:50:12 -0700
(PDT)
Resent-From: pci-sig-request@znyx.com
Received: from ormail.intel.com (ormail.intel.com [134.134.248.3]) by relay.jf.i
ntel.com (8.7.4/8.7.3) with ESMTP id EAA15296; Fri, 11 Oct 1996 04:50:11 -0700 (
PDT)
Return-Path: pci-sig-request@znyx.com
q€n