Re: Host Bridge Bandwidth Starvation

["David O'Shea" <daveo@larry.corollary.com>]

At 08:45 AM 10/15/96 CDT, Jim Holeman wrote:
>
> On a somewhat related note concerning the behavior of host bridges -
>
> PCI provides for relative fairness of allowing multiple devices to have
> access to the PCI bus.
>
> However, suppose that multiple high bandwidth PCI devices are attempting 
> to burst large amounts of data to host memory concurrently.  Is possible/
> likely/unlikely/? that these devices could
>            a) fill all of the host bridge's PCI to memory write FIFO's
>            b) cause the bridge to begin retrying subsequent PCI to memory
>               write attempts until a FIFO becomes available.
>            c) reach a quasi-stable condition in which one of the devices
>               acquires the bus writes a burst which fills up the
>               FIFO's again and releases the bus. The next device then
>               acquires the bus and is retried. The first device reacquires
>               the bus...just as the FIFO becomes available, fills it up 
>               again, and releases the bus. The second device gets retried
>               again, and so on.  Thus the first device gets its data moved
>               while the second device gets starved.
> Is this paranoid, or is this feasible?  If so, are there any guarantees and/or
> ways to calculate how long such a condition could last.

Yes this can happen.   No there is no way to predict how long it can go on.
If your board was board #2 and board #1 and the host bridge had just the
correct bandwitdth matchup, then it could go on indefinitely.  

Usually the bus arbiter is programmed to withold grant from a just retried
board for some period of time: 1,2,4,16... clocks.   This would just modify
the dynamics of the situation, but not change the fact that board #1 and
the host bridge could have time-interval/bandwidth consumption relationship
that starves out other devices.  

Technically speaking, the host bridge is supposed to prevent this.  I forget
the PCI spec section, but there is a statement along the lines of
"A bridge must guarantee access to system memory .... to a device... blah.
blah.. blah...".    But no host bridges really have special logic in them to
track WHO has done the last transactions and thus retry such a device
because it has gotten all of the bandwidth recently.

The likelyhood of a starvation failure problem occur simply increases as
the number and total bandwidth of consumers increases.  But it depends on
the characterisics of the resource (host bridge) and the consumers (other
cards) and so it is not calculatable without the specifics of all of the
boards.  You would also need the specifics on the bus arbiter in order to
do a calculation.  

David O'Shea
䟓