Re: Disabling a BAR

[Devendra K Tripathi <tripathi@Synopsys.COM>]

Hi Cliff,

> Is a BAR supposed to be disabled when configuration software writes a
> particular value (presumably zero, although all ones would make sense as
> well)?

If we excude the address part, there is no way to disable a "particular" BAR.
Offcourse we can disable complete space.

> 
> Is it non-compliant for a target device to respond to an address of zero
> (up to the range of the BAR) if one of its BARs is configured with a
> zero address field (the core I am using does)? 

I do not have an emphatic answer to this. I asked this question a while back and
response was that "it is illegal to have zero address in BAR range". As somebody
pointed out that time that lower address is normally assigned to local resources
so a an address "zero" will we out of scope of a PCI device.



> If a BAR is disabled, does that mean that it should read back as
> non-existent (LS four bits forced to zero)?  Is it sufficient for it to
> just not respond to bus transactions?  Will it confuse any software if
> the BAR reads as existing but zero?

This may not help as lower four bits being zero implies " a non prefetchable memory
space which is locatable anywhere in 32 bit address space". I think, this
is a legal case. 



> I am planning on detecting a zero address field to disable a BAR and
> ignore any address within the range defined by that BAR.  I plan to
> force the LS four bits to zero if the address range is zero.
 
As pointed above, it may not help. The only possibility is to detect this
condition and not generate DEVSEL.

> Comments/Answers?
> 
> Cliff Kimmery
> Honeywell Inc.
> kimmery@space.honeywell.com


Thanks,
Tripathi.


PS: I will appreciate if somebody could give an emphatic answer to second item that is
    "is it illegal to assign address zero to BAR" or in other words "is it OK
    not to assert DEVSEL if complete address field is zero".
˜¬™