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Live PCI interface in a powered down system
- To: Mailing List Recipients <pci-sig-request@znyx.com>
- Subject: Live PCI interface in a powered down system
- From: Chas Horvath <chas@isis.com>
- Date: Wed, 23 Oct 1996 13:30:35 -0400
- Cc: chas@isis.com
- Resent-Date: Wed, 23 Oct 1996 13:30:35 -0400
- Resent-From: pci-sig-request@znyx.com
- Resent-Message-Id: <"GLhHD1.0.8-1.PRbRo"@dart>
- Resent-Sender: pci-sig-request@znyx.com
We'd like to design a PCI board that has power applied to it even when
the rest of the system it is in in powered off. The board would be
responsible for a variety of system management functions including
powering the rest of the system on and off. It would be connected to
an external power source and an external terminal.
Does the PCI spec address how a powered up PCI interface should behave
in a powered down PCI bus? Two areas of concern are:
1) low level electrical considerations, e.g. can the drivers handle this
situation
2) PCI protocol considerations, e.g. will an interface seeing a powered
down PCI bus go off into the weeds because all PCI inputs are in
bogus state (all inputs low).
Our software would ensure we are not trying to use the interface when
the system is powered down.
In glancing at the 2.1 PCI spec, PLX PCI9060 data sheets, and Intel
80960RP data sheets the issues above are not addressed. I assume that
means we are out of luck.
Can anyone offer any insights here? Thanks.
) )