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Re: PCI arbiter implementation
Greetings!
>
>
> With enough requestors going at the same time on the bus, one or more
> devices can be starved, and never successfully complete a transaction.
>
> i.e. with the right relationships between
> retry latencies, write transactions, and memory controller behavior,
> one PCI device could lock out another PCI device.
> (with a simple round-robin arbiter)
>
>
> The memory controller may force a retry time and time again to the same
> transaction request because in between each retry it took another transaction
> from someone else.
>
<< similar thoughts deleted to save space >>
> This is a basic arbiter/fairness issue, that has been addressed specifically
> over the years by other shared bus architectures. Is it just ignored here
> or am I missing something key?
>
As you indicate, this is a generic finite resource multiple accessor problem.
Unless the grantor process algorithm can track forward progress for each
requestor/accessor, the possibility of starvation exists.
I don't believe that there is anything in the PCI spec that governs forward
progress. The system designer needs to specify appropriate arbiter
behaviour for the expected transaction mix, mindful of these pathologic
problems.
Note, that the complexity of this problem can get quite interesting if
there are multiple levels of bridges or bus converters involved.
===
tom keaveny
disclaimer: "comments are my own and not necessarily that of Hewlett Packard"
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