(Fwd) Re: 66 MHz Capability bit in AGP

["Monish Shah" <monish@hpfcmss.fc.hp.com>]

On Nov 5,  7:47pm, Peter N. Glaskowsky wrote:
> Subject: Re: 66 MHz Capability bit in AGP
>
> > If you PCI (not AGP) card grounds the M66EN pin, it had better also make
> > the 66 MHz capable bit false.  The host is free to look at either one to
> > decide which frequency it should run at.
>
> Um, I don't think so. Doesn't a grounded M66EN pin _force_ the bus to 33
> MHz? The central resource has to do this, I thought.

OK, I actually looked at the spec this time, and here's what I found:

"The 66 MHz PCI clock generation circuitry must connect to M66EN to
generate the appropriate clock for the segment (33 to 66 MHz if M66EN is
asserted, 0 to 33 MHz if M66EN is deasserted)."  (page 221)

That supports Peter's position.  But, I also found:

"All 66 MHz PCI agents must support a read-only 66MHZ_CAPABLE flag located
in bit 5 of the PCI status register for that agent.  If set, the
66MHZ_CAPABLE bit signifies that the agent can operate in 66 MHz PCI mode."
(page 220)

That supports my position that an agent that isn't capable of true 66 MHz
PCI timing should not set that bit.

So, a device designed to AGP timing should not set the 66MHZ_CAPABLE flag
if it is on a PCI card.

But what about a true 66 MHz PCI chip that happens to be put on a board
that grounds M66EN?  I don't know why you'd do this, but this actually
seems legal, based on what I quoted above!

So, I agree that it isn't clear from the spec that the host is free to look
at either one to decide which frequency to run at.

> My spec's at work, and
> you know, there's no electronic version on the Web anywhere. Someday I'm
> just gonna set OmniPage Pro to work on it, if only for myself. (Yeah, I
> know, the PCI SIG makes money from selling paper copies. If you're
> listening, guys-- please join us here in the 20th Century before it becomes
> the 21st, okay?)

You should order rev 2.1s of the spec.  The "s" at the end means that along
with the paper copy, you get a couple of floppies that contain an
electronic copy of the spec.  It is in Acrobat format and does give you
rudimentary search capabilities.  That can be extremely useful.

> > If you really want to build silicon to work either as AGP or as PCI, you
> > should either just design to 66 MHz PCI timing or burn a pin on the chip to
> > tell you whether you're on a PCI board or an AGP board and set the 66 MHz
> > capable flag accordingly.
>
> I think it's reasonable to be 33-MHz PCI or 66-MHz AGP;

Agreed.

> you may never see a 66-MHz PCI slot anywhere.

You won't, in a desktop PC.  You will, elsewhere.

> It's also reasonable not to want to lose a pin on
> the chip. I've seen chips squeezed into a 208-PQFP that really should have
> been put in a 240-PQFP, just for cost reasons. If someone's going to that
> trouble, adding a pin for a function that's only used for about 5 ns after
> RESET* is deasserted is rather unattractive.

Yes, pins are precious.  But, there is something to be said for being
compliant with the spec, too.  Also, it isn't a given that this would cost
you a pin.  It could be multiplexed onto a pin that is normally used for
something else.  That all depends on the design.

> .               png

Monish
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