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P6 bursting
- To: Mailing List Recipients <pci-sig-request@znyx.com>
- Subject: P6 bursting
- From: kguy <kguy@a-d-inc.com>
- Date: Wed, 13 Nov 96 14:09 MST
- Resent-Date: Wed, 13 Nov 96 14:09 MST
- Resent-From: pci-sig-request@znyx.com
- Resent-Message-Id: <"2iBsi1.0.dW1.3aZYo"@dart>
- Resent-Sender: pci-sig-request@znyx.com
Dear PCI SIG members,
I have been told that if an initiator is not using caching commands
(particularly the Write and Invalidate command) when bursting on a
P6 system, the initiator will be disconnected after only one dword transfer.
Is this true ? Also, does anyone know of any FPGA PCI core macros that
support all the caching commands ?
Thanks,
KGUY
Kevin Guy
Senior Engineer
Advanced Designs, Inc
email address: kguy@a-d-inc.com
phone: (719)598-9224
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