RE: how do we write a single byte in the config. registers?

["Taylor, Mike" <mike@buntypost.dundee.ncr.com>]

John,
Thanks for the reply, but the Config #2 accesses are not trapped by the   
motherboard. Method #2 uses IO space C000-CFFF. Bits 11-8 select the PCI   
device (1 of 16), bits 7-2 select a DWORD in the device's configuration   
space. IO accesses are therefore to C0xx, C1xx, thru' CFxx. This problem   
exists, a well known graphics card BIOS attempts Config #2 cycles and   
interferes with a proprietary card in our system.
[ The card is actually the MATROX Millenium, MATROX are now aware of the   
problem and their next BIOS, 2.3, will correct the problem.]
Regards,
Mike

 ----------
From: 	John R Pierce[SMTP:pierce@scruznet.com]
Sent: 	20 November 1996 08:23
To: 	Taylor, Mike; pci-sig
Subject: 	Re: how do we write a single byte in the config. registers?

> Beware of config. method #2. If your host chipset does not support   
method
> #2, Triton family for example, then the accesses appear on the ISA bus   
    

> and ISA cards can react to the aliases of the config addresses. e.g.   
C200
> can be seen as x200.

Ah, but isn't the port in question always X0XX?  [I don't have my PCI
references handy to recall the details here...]  If so, that shouldn't be   
a
problem, as addresses with 00 in bits 8,9 are reserved for the   
motherboard and
a PCI motherboard will decode bits 10-15=0 before enabling motherboard   
IO...

 -jrp

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