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Hot Swapping With PCI
- To: Mailing List Recipients <pci-sig-request@znyx.com>
- Subject: Hot Swapping With PCI
- From: Phil Cupryk <Phil.Cupryk@Matrox.COM>
- Date: Thu, 28 Nov 1996 13:59:14 -0500 (EST)
- Resent-Date: Thu, 28 Nov 1996 13:59:14 -0500 (EST)
- Resent-From: pci-sig-request@znyx.com
- Resent-Message-Id: <"NE07A1.0.8f5.E5Udo"@dart>
- Resent-Sender: pci-sig-request@znyx.com
Hello PCI colleagues,
I have the following dilemma with my hot swapping design,
Presently I am ramping the 5V supply to my PCI board in order
to limit the rush-in current. I have changed the ramp time to
50ms on this supply. After the supply has been ramped to the
board, the reset (which I generate) continues for about 250ms,
after which it is deasserted and the host can reprogram the
configuration space of the new card with the same setup as the
removed device. On powerup (no hotswap involved), I see
that the PCI reset lasts longer than my generated reset, thus no
problem. This means that the PCI reset is atleast > 250ms on
the pc with which I am testing my card.
The problem is the following:
Section 4.2.3.2 Timing Parameters PCI Version 2.1 states
that the reset minimum active time after power stable is 1ms.
Therefore, the pci reset can go inactive within 1ms of powergood.
This only allows me to ramp the +5V supply to the board and have
my hotswap reset complete within the 1ms, otherwise the master won't
be able to detect my card when configuration accesses are done.
To finish this within the specified minimum does not allow for a
good rise time on the 5 Volt Supply. This type of rise time can
trip the supply of the pc.
I ask therefore, what kind of practice do the boards have with respect
to pci reset and powerup? What is the minimum practiced reset deassertion
one has seen after powergood is active?
Thanks in advance,
Phil
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Phil Cupryk Matrox Electronic Systems
ASIC Hardware Design Engineer Video Products Group
EMAIL: pcupryk@matrox.com 1055 St-Regis Blvd.
TEL : (514) 685-7230 ext: 2789 Dorval, Quebec
FAX : (514) 685-7030 H9P 2T4
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