Re: CPU-PCI cycles

[Andreas Heiner <Andreas.Heiner@fr.bosch.de>]

Rafi Boneh <RAFIB@GILAT.MHS.CompuServe.COM> writes...
> I am trying to write a Win95 VXD for a PCI chip.
> I am using a PCI bus analyzer and trying to compare my code to what I see
> on the bus.
> It seems that there are some differences. For instance:
> *) I am writing twice the same LongWord to the same address, and I see
> only one single transfer transaction on the PCI bus.
> *) When I write two different LongWords to the same address, I again see
> only one single transfer transaction, with data equivalent to the second
> write.
> It seems like the host bridge "interprets" my commands, and decides
> itself that there is
> no sense in writing the same word to the same location twice, or writing
> different words to the same locations, and so on.
> I have my own reasons to do so (accessing command and control register on
> the chip).
>
> Dose some one have an idea how can I access the locations I want, in the
> sequence I want, or what limitations do I have one such operations?

We have had the same problems some weeks ago. The problem was, that the
C-compiler optimizes the code and don't access the same address with the
same value twice. You have to declare your pointers with a 'volatile'
before your declaration:

volatile long * pointer_p;

In this case it is not allowed for the compiler to optimize accesses to
this pointer.

I hope this will be helpfull.


Best regards,


Andreas Heiner


mailto:Andreas.Heiner@fr.bosch.de

Tel.: ++49 (5121) 49-3946
Fax.: ++49 (5121) 49-3910

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